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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-12-05 18:05:06 -0600 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-01-17 10:38:18 -1000 |
| commit | a228ae3ea7f6fa9e7eda53906471f1cfc400c114 (patch) | |
| tree | f5be6fd492c61624926bb3658e177501eab69358 /scripts/shaderinclude.py | |
| parent | 1e42b4f8079f7486689693187572452bbec2f158 (diff) | |
| download | focaccia-qemu-a228ae3ea7f6fa9e7eda53906471f1cfc400c114.tar.gz focaccia-qemu-a228ae3ea7f6fa9e7eda53906471f1cfc400c114.zip | |
tcg/sparc64: Reorg goto_tb implementation
The old sparc64 implementation may replace two insns, which leaves a race condition in which a thread could be stopped at a PC in the middle of the sequence, and when restarted does not see the complete address computation and branches to nowhere. The new implemetation replaces only one insn, swapping between a direct branch and a direct call. The TCG_REG_TB register is loaded from tb->jmp_target_addr[] in the delay slot. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'scripts/shaderinclude.py')
0 files changed, 0 insertions, 0 deletions