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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-23 11:15:43 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-06-23 11:15:43 +0100 |
| commit | 87bfbfe7e595372251037c28223919659a294fd3 (patch) | |
| tree | 88ea9236782512c897985043507109cf13e6b770 /scripts/tracetool/backend/log.py | |
| parent | aa3cc42c016116615b80359ab4dd8a934339aec5 (diff) | |
| download | focaccia-qemu-87bfbfe7e595372251037c28223919659a294fd3.tar.gz focaccia-qemu-87bfbfe7e595372251037c28223919659a294fd3.zip | |
target/arm: SCR_EL3.NS may be RES1
With RME, SEL2 must also be present to support secure state. The NS bit is RES1 if SEL2 is not present. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230620124418.805717-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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