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| author | Clément Chigot <chigot@adacore.com> | 2025-04-25 11:35:13 +0200 |
|---|---|---|
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2025-05-27 20:09:13 +0100 |
| commit | 4ec799dd17dcbb0fa4e90e685d5d6fcf8f72338a (patch) | |
| tree | 49599d78cd9399f02c5e03ef579c51877752cc90 /scripts/tracetool/backend/ust.py | |
| parent | 80db93b2b88f9b3ed8927ae7ac74ca30e643a83e (diff) | |
| download | focaccia-qemu-4ec799dd17dcbb0fa4e90e685d5d6fcf8f72338a.tar.gz focaccia-qemu-4ec799dd17dcbb0fa4e90e685d5d6fcf8f72338a.zip | |
target/sparc: don't set FSR_NVA when comparing unordered floats
FSR_NVA should be set when one of the operands is a signaling NaN or when using FCMPEx instructions. But those cases are already handled within check_ieee_exception or floatxx_compare functions. Otherwise, it should be left untouched. FTR, this was detected by inf-compare-[5678] tests within gcc testsuites. Signed-off-by: Clément Chigot <chigot@adacore.com> Message-Id: <20250425093513.863289-1-chigot@adacore.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'scripts/tracetool/backend/ust.py')
0 files changed, 0 insertions, 0 deletions