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authorAurelien Jarno <aurelien@aurel32.net>2015-07-14 17:45:16 +0200
committerLeon Alrae <leon.alrae@imgtec.com>2015-07-15 14:07:25 +0100
commit908680c6441ac468f4871d513f42be396ea0d264 (patch)
tree859583452660338766188f7f8dd438fabcc8774e /scripts/update-linux-headers.sh
parentf01a361bfcce4bd0c439b0e051ef2a1e56727a44 (diff)
downloadfocaccia-qemu-908680c6441ac468f4871d513f42be396ea0d264.tar.gz
focaccia-qemu-908680c6441ac468f4871d513f42be396ea0d264.zip
target-mips: fix page fault address for LWL/LWR/LDL/LDR
When a LWL, LWR, LDL or LDR instruction triggers a page fault, QEMU
currently reports the aligned address in CP0 BadVAddr, while the Windows
NT kernel expects the unaligned address.

This patch adds a byte access with the unaligned address at the
beginning of the LWL/LWR/LDL/LDR instructions to possibly trigger a page
fault and fill the QEMU TLB.

Cc: Leon Alrae <leon.alrae@imgtec.com>
Reported-by: Hervé Poussineau <hpoussin@reactos.org>
Tested-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'scripts/update-linux-headers.sh')
0 files changed, 0 insertions, 0 deletions