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| author | Stafford Horne <shorne@gmail.com> | 2017-04-15 07:25:32 +0900 |
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| committer | Stafford Horne <shorne@gmail.com> | 2017-05-04 09:39:01 +0900 |
| commit | ef3f5b9e7f83262e1eaea884b0a562b9fa73859c (patch) | |
| tree | 2565480f3a429a363ab1cd5a8ba01993cb8d199c /scripts | |
| parent | 461a4b944f7e036b2f6bd1fce83ad4fe09e5e2bc (diff) | |
| download | focaccia-qemu-ef3f5b9e7f83262e1eaea884b0a562b9fa73859c.tar.gz focaccia-qemu-ef3f5b9e7f83262e1eaea884b0a562b9fa73859c.zip | |
target/openrisc: add numcores and coreid support
These are used to identify the processor in SMP system. Their definition has been defined in verilog cores but it not yet part of the spec but it will be soon. The proposal for this is available: https://openrisc.io/proposals/core-identifier-and-number-of-cores Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stafford Horne <shorne@gmail.com>
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