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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2024-09-16 18:35:14 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2024-11-04 16:03:24 -0500 |
| commit | 845f94de78cb6c063234176ff7c0ac8e430d19fe (patch) | |
| tree | cf27df7b9539aed492923b92149f7453eea06aa0 /system/memory_mapping.c | |
| parent | 1478b5609022ed4331bff83d06cefed983df82ac (diff) | |
| download | focaccia-qemu-845f94de78cb6c063234176ff7c0ac8e430d19fe.tar.gz focaccia-qemu-845f94de78cb6c063234176ff7c0ac8e430d19fe.zip | |
hw/pci-bridge/cxl_upstream: Provide x-speed and x-width properties.
Copied from gen_pcie_root_port.c Drop the previous code that ensured a valid value in s->width, s->speed as now a default is provided so this will always be set. Note this changes the default settings but it is unlikely to have a negative effect on software as will only affect ports with now downstream device. All other ports will use the settings from that device. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240916173518.1843023-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'system/memory_mapping.c')
0 files changed, 0 insertions, 0 deletions