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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-08-04 14:41:54 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-08-04 14:41:54 +0100
commit2f0180c51bfbd00b35d02149b831734f04c12d44 (patch)
tree4c218ea8028ca80ab170e19fd2634dc2d4cd603e /target-arm/cpu.h
parentf151b123a35ff36085fb765a7a16373644711df1 (diff)
downloadfocaccia-qemu-2f0180c51bfbd00b35d02149b831734f04c12d44.tar.gz
focaccia-qemu-2f0180c51bfbd00b35d02149b831734f04c12d44.zip
target-arm: Make far_el1 an array
No functional change.
Prepares for future additions of the EL2 and 3 versions of this reg.

Reviewed-by: Greg Bellows <greg.bellows@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1402994746-8328-5-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 369d4727ae..b755f99e64 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -187,7 +187,7 @@ typedef struct CPUARMState {
         uint32_t ifsr_el2; /* Fault status registers.  */
         uint64_t esr_el[2];
         uint32_t c6_region[8]; /* MPU base/size registers.  */
-        uint64_t far_el1; /* Fault address registers.  */
+        uint64_t far_el[2]; /* Fault address registers.  */
         uint64_t par_el1;  /* Translation result. */
         uint32_t c9_insn; /* Cache lockdown registers.  */
         uint32_t c9_data;