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authorBlue Swirl <blauwirbel@gmail.com>2011-07-20 20:23:01 +0000
committerBlue Swirl <blauwirbel@gmail.com>2011-07-20 20:23:01 +0000
commita3ce3668ccff7d350a4f795ad99a012a6d41caef (patch)
tree01f5f907ceaba5daaf3509b0a051dd8c76339271 /target-arm/cpu.h
parent03ff09580ef6cbc4a893b6e3e6bbff33180ec70a (diff)
parent82845826e89fdc02f6f000fca5d5019ec9be4ab3 (diff)
downloadfocaccia-qemu-a3ce3668ccff7d350a4f795ad99a012a6d41caef.tar.gz
focaccia-qemu-a3ce3668ccff7d350a4f795ad99a012a6d41caef.zip
Merge branch 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  target-arm: Fix BASEPRI, BASEPRI_MAX, and FAULTMASK access
  target-arm: Minimal implementation of performance counters
  Revert "Makefile.target: Allow target helpers to be in any *_helper.c file"
  Revert "target-arm: Use global env in neon_helper.c helpers"
  target-arm: Pass fp status pointer explicitly to neon fp helpers
  target-arm: Make VFP binop helpers take pointer to fpstatus, not CPUState
  target-arm: Add helper function to generate code to get fpstatus pointer
  Revert "target-arm: Use global env in iwmmxt_helper.c helpers"

Conflicts:
	Makefile.target
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 1022a03753..adef42785c 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -133,6 +133,12 @@ typedef struct CPUARMState {
         uint32_t c7_par;  /* Translation result. */
         uint32_t c9_insn; /* Cache lockdown registers.  */
         uint32_t c9_data;
+        uint32_t c9_pmcr; /* performance monitor control register */
+        uint32_t c9_pmcnten; /* perf monitor counter enables */
+        uint32_t c9_pmovsr; /* perf monitor overflow status */
+        uint32_t c9_pmxevtyper; /* perf monitor event type */
+        uint32_t c9_pmuserenr; /* perf monitor user enable */
+        uint32_t c9_pminten; /* perf monitor interrupt enables */
         uint32_t c13_fcse; /* FCSE PID.  */
         uint32_t c13_context; /* Context ID.  */
         uint32_t c13_tls1; /* User RW Thread register.  */
@@ -438,7 +444,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
 #define cpu_signal_handler cpu_arm_signal_handler
 #define cpu_list arm_cpu_list
 
-#define CPU_SAVE_VERSION 3
+#define CPU_SAVE_VERSION 4
 
 /* MMU modes definitions */
 #define MMU_MODE0_SUFFIX _kernel