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| author | Anthony Liguori <aliguori@amazon.com> | 2013-12-10 16:13:32 -0800 |
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| committer | Anthony Liguori <aliguori@amazon.com> | 2013-12-10 16:13:32 -0800 |
| commit | 1ead3ed55584a62a12d840a71d3aab71f12ec42e (patch) | |
| tree | 33bd2288c1d84b1342f1022afab001415a5f5037 /target-arm/kvm_arm.h | |
| parent | b5527dad7dba7d85520aaec787fb6fb14be1c366 (diff) | |
| parent | 74f1c6ddec8dc7566d9b75574bb006214cc7d3b4 (diff) | |
| download | focaccia-qemu-1ead3ed55584a62a12d840a71d3aab71f12ec42e.tar.gz focaccia-qemu-1ead3ed55584a62a12d840a71d3aab71f12ec42e.zip | |
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20131210' into staging
target-arm queue: * support REFCNT register on integrator/cp board * implement the A9MP's global timer * add the 'virt' platform * support '-cpu host' on KVM/ARM * Cadence GEM ethernet device bugfixes * Implement 32-bit ARMv8 VSEL, VMAXNM, VMINNM * fix TTBCR write masking * update 32 bit decoder to use new qemu_ld/st TCG opcodes # gpg: Signature made Tue 10 Dec 2013 06:22:01 AM PST using RSA key ID 14360CDE # gpg: Can't check signature: public key not found # By Peter Crosthwaite (16) and others # Via Peter Maydell * pmaydell/tags/pull-target-arm-20131210: (37 commits) target-arm: fix TTBCR write masking target-arm: Use new qemu_ld/st opcodes target-arm: Implement ARMv8 SIMD VMAXNM and VMINNM instructions. target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions. softfloat: Add minNum() and maxNum() functions to softfloat. softfloat: Remove unused argument from MINMAX macro. target-arm: Implement ARMv8 VSEL instruction. target-arm: Move call to disas_vfp_insn out of disas_coproc_insn. net/cadence_gem: Don't rx packets when no rx buffer available net/cadence_gem: Improve can_receive debug printfery net/cadence_gem: Fix register w1c logic net/cadence_gem: Fix small packet FCS stripping net/cadence_gem: Fix rx multi-fragment packets net/cadence_gem: Add missing VMSTATE_END_OF_LIST net/cadence_gem: Implement SAR (de)activation net/cadence_gem: Implement SAR match bit in rx desc net/cadence_gem: Implement RX descriptor match mode flags net/cadence_gem: Prefetch rx descriptors ASAP net/cadence_gem: simplify rx buf descriptor walking net/cadence_gem: Don't assert against 0 buffer address ... Message-id: 1386686613-2390-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@amazon.com>
Diffstat (limited to 'target-arm/kvm_arm.h')
| -rw-r--r-- | target-arm/kvm_arm.h | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/target-arm/kvm_arm.h b/target-arm/kvm_arm.h index 5d14887e66..cd3d13ca2d 100644 --- a/target-arm/kvm_arm.h +++ b/target-arm/kvm_arm.h @@ -62,4 +62,59 @@ bool write_list_to_kvmstate(ARMCPU *cpu); */ bool write_kvmstate_to_list(ARMCPU *cpu); +#ifdef CONFIG_KVM +/** + * kvm_arm_create_scratch_host_vcpu: + * @cpus_to_try: array of QEMU_KVM_ARM_TARGET_* values (terminated with + * QEMU_KVM_ARM_TARGET_NONE) to try as fallback if the kernel does not + * know the PREFERRED_TARGET ioctl + * @fdarray: filled in with kvmfd, vmfd, cpufd file descriptors in that order + * @init: filled in with the necessary values for creating a host vcpu + * + * Create a scratch vcpu in its own VM of the type preferred by the host + * kernel (as would be used for '-cpu host'), for purposes of probing it + * for capabilities. + * + * Returns: true on success (and fdarray and init are filled in), + * false on failure (and fdarray and init are not valid). + */ +bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try, + int *fdarray, + struct kvm_vcpu_init *init); + +/** + * kvm_arm_destroy_scratch_host_vcpu: + * @fdarray: array of fds as set up by kvm_arm_create_scratch_host_vcpu + * + * Tear down the scratch vcpu created by kvm_arm_create_scratch_host_vcpu. + */ +void kvm_arm_destroy_scratch_host_vcpu(int *fdarray); + +#define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU +#define ARM_HOST_CPU_CLASS(klass) \ + OBJECT_CLASS_CHECK(ARMHostCPUClass, (klass), TYPE_ARM_HOST_CPU) +#define ARM_HOST_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(ARMHostCPUClass, (obj), TYPE_ARM_HOST_CPU) + +typedef struct ARMHostCPUClass { + /*< private >*/ + ARMCPUClass parent_class; + /*< public >*/ + + uint64_t features; + uint32_t target; + const char *dtb_compatible; +} ARMHostCPUClass; + +/** + * kvm_arm_get_host_cpu_features: + * @ahcc: ARMHostCPUClass to fill in + * + * Probe the capabilities of the host kernel's preferred CPU and fill + * in the ARMHostCPUClass struct accordingly. + */ +bool kvm_arm_get_host_cpu_features(ARMHostCPUClass *ahcc); + +#endif + #endif |