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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-09-06 13:33:17 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-09-06 13:33:17 +0100 |
| commit | 085c9150195b383cb978351e12d24df9ba129ae9 (patch) | |
| tree | 39569dd54ded58068aae78957dccc913ca077782 /target-i386/cpu.c | |
| parent | 30e7d092b26146eb2abb77e0a0952aea012e36bf (diff) | |
| parent | 6546d0dba6c211c1a3eac1252a4f50a0c151a08a (diff) | |
| download | focaccia-qemu-085c9150195b383cb978351e12d24df9ba129ae9.tar.gz focaccia-qemu-085c9150195b383cb978351e12d24df9ba129ae9.zip | |
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging
x86 and memory backends queue, 2016-09-05 This includes a few features that were submitted just after hard freeze, and a bug fix for memory backend initialization ordering. # gpg: Signature made Mon 05 Sep 2016 20:50:14 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-pull-request: vl: Delay initialization of memory backends vhost-user-test: Use libqos instead of pxe-virtio.rom target-i386: Add more Intel AVX-512 instructions support exec: Ensure the only one cpu_index allocation method is used Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-i386/cpu.c')
| -rw-r--r-- | target-i386/cpu.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 6a1afab595..ec674dcb73 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -298,14 +298,18 @@ static const char *svm_feature_name[] = { }; static const char *cpuid_7_0_ebx_feature_name[] = { - "fsgsbase", "tsc_adjust", NULL, "bmi1", "hle", "avx2", NULL, "smep", - "bmi2", "erms", "invpcid", "rtm", NULL, NULL, "mpx", NULL, - "avx512f", NULL, "rdseed", "adx", "smap", NULL, "pcommit", "clflushopt", - "clwb", NULL, "avx512pf", "avx512er", "avx512cd", NULL, NULL, NULL, + "fsgsbase", "tsc_adjust", NULL, "bmi1", + "hle", "avx2", NULL, "smep", + "bmi2", "erms", "invpcid", "rtm", + NULL, NULL, "mpx", NULL, + "avx512f", "avx512dq", "rdseed", "adx", + "smap", "avx512ifma", "pcommit", "clflushopt", + "clwb", NULL, "avx512pf", "avx512er", + "avx512cd", NULL, "avx512bw", "avx512vl", }; static const char *cpuid_7_0_ecx_feature_name[] = { - NULL, NULL, "umip", "pku", + NULL, "avx512vbmi", "umip", "pku", "ospke", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |