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| author | Anthony Liguori <aliguori@us.ibm.com> | 2012-07-18 14:44:43 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-07-18 14:44:43 -0500 |
| commit | 09f06a6c603ce64284287d32f6ffadaaa5064850 (patch) | |
| tree | 176bbc325a87eb4961ec8605e75d326746e7c9bb /target-i386/cpu.h | |
| parent | 513e6bde4fa551c293e7d346e27b618b57a4087a (diff) | |
| parent | 15b2bd1847239fe0b4a1041b69a631741d2e273a (diff) | |
| download | focaccia-qemu-09f06a6c603ce64284287d32f6ffadaaa5064850.tar.gz focaccia-qemu-09f06a6c603ce64284287d32f6ffadaaa5064850.zip | |
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master: virtio: move common irqfd handling out of virtio-pci virtio: move common ioeventfd handling out of virtio-pci event_notifier: add event_notifier_set_handler memory: pass EventNotifier, not eventfd ivshmem: wrap ivshmem_del_eventfd loops with transaction ivshmem: use EventNotifier and memory API event_notifier: add event_notifier_init_fd event_notifier: remove event_notifier_test event_notifier: add event_notifier_set apic: Defer interrupt updates to VCPU thread apic: Reevaluate pending interrupts on LVT_LINT0 changes apic: Resolve potential endless loop around apic_update_irq kvm: expose tsc deadline timer feature to guest kvm_pv_eoi: add flag support kvm: Don't abort on kvm_irqchip_add_msi_route()
Diffstat (limited to 'target-i386/cpu.h')
| -rw-r--r-- | target-i386/cpu.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index f257c972fb..2a61c810bb 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -400,6 +400,7 @@ #define CPUID_EXT_X2APIC (1 << 21) #define CPUID_EXT_MOVBE (1 << 22) #define CPUID_EXT_POPCNT (1 << 23) +#define CPUID_EXT_TSC_DEADLINE_TIMER (1 << 24) #define CPUID_EXT_XSAVE (1 << 26) #define CPUID_EXT_OSXSAVE (1 << 27) #define CPUID_EXT_HYPERVISOR (1 << 31) @@ -477,6 +478,7 @@ for syscall instruction */ /* i386-specific interrupt pending bits. */ +#define CPU_INTERRUPT_POLL CPU_INTERRUPT_TGT_EXT_1 #define CPU_INTERRUPT_SMI CPU_INTERRUPT_TGT_EXT_2 #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 #define CPU_INTERRUPT_MCE CPU_INTERRUPT_TGT_EXT_4 @@ -1047,7 +1049,8 @@ static inline void cpu_clone_regs(CPUX86State *env, target_ulong newsp) static inline bool cpu_has_work(CPUX86State *env) { - return ((env->interrupt_request & CPU_INTERRUPT_HARD) && + return ((env->interrupt_request & (CPU_INTERRUPT_HARD | + CPU_INTERRUPT_POLL)) && (env->eflags & IF_MASK)) || (env->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_INIT | |