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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-09-16 16:19:49 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-09-16 16:19:49 +0100 |
| commit | 3c4698d0b5cb19212868f94f0ba4743c2c86f91f (patch) | |
| tree | c173153700e461d22a311eed3281116337fe08dd /target-i386/excp_helper.c | |
| parent | 1a3abef74b5df6d6d3e851aaeacac8f265adcf80 (diff) | |
| parent | 4054cdec0423c7190bfc733c27c303d513d531ab (diff) | |
| download | focaccia-qemu-3c4698d0b5cb19212868f94f0ba4743c2c86f91f.tar.gz focaccia-qemu-3c4698d0b5cb19212868f94f0ba4743c2c86f91f.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-target-i386-20150915' into staging
Exception handling improvments from Pavel Dovgalyuk. # gpg: Signature made Tue 15 Sep 2015 20:36:14 BST using RSA key ID 4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" * remotes/rth/tags/pull-target-i386-20150915: target-i386: exception handling for other helper functions target-i386: exception handling for seg_helper functions target-i386: exception handling for memory helpers target-i386: exception handling for div instructions target-i386: exception handling for FPU instructions target-i386: introduce new raise_exception functions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-i386/excp_helper.c')
| -rw-r--r-- | target-i386/excp_helper.c | 30 |
1 files changed, 17 insertions, 13 deletions
diff --git a/target-i386/excp_helper.c b/target-i386/excp_helper.c index 99fca847dd..5e347bc46c 100644 --- a/target-i386/excp_helper.c +++ b/target-i386/excp_helper.c @@ -22,14 +22,6 @@ #include "sysemu/sysemu.h" #include "exec/helper-proto.h" -#if 0 -#define raise_exception_err(env, a, b) \ - do { \ - qemu_log("raise_exception line=%d\n", __LINE__); \ - (raise_exception_err)(env, a, b); \ - } while (0) -#endif - void helper_raise_interrupt(CPUX86State *env, int intno, int next_eip_addend) { raise_interrupt(env, intno, 1, 0, next_eip_addend); @@ -92,7 +84,8 @@ static int check_exception(CPUX86State *env, int intno, int *error_code) */ static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno, int is_int, int error_code, - int next_eip_addend) + int next_eip_addend, + uintptr_t retaddr) { CPUState *cs = CPU(x86_env_get_cpu(env)); @@ -108,7 +101,7 @@ static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno, env->error_code = error_code; env->exception_is_int = is_int; env->exception_next_eip = env->eip + next_eip_addend; - cpu_loop_exit(cs); + cpu_loop_exit_restore(cs, retaddr); } /* shortcuts to generate exceptions */ @@ -116,16 +109,27 @@ static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno, void QEMU_NORETURN raise_interrupt(CPUX86State *env, int intno, int is_int, int error_code, int next_eip_addend) { - raise_interrupt2(env, intno, is_int, error_code, next_eip_addend); + raise_interrupt2(env, intno, is_int, error_code, next_eip_addend, 0); } void raise_exception_err(CPUX86State *env, int exception_index, int error_code) { - raise_interrupt2(env, exception_index, 0, error_code, 0); + raise_interrupt2(env, exception_index, 0, error_code, 0, 0); +} + +void raise_exception_err_ra(CPUX86State *env, int exception_index, + int error_code, uintptr_t retaddr) +{ + raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr); } void raise_exception(CPUX86State *env, int exception_index) { - raise_interrupt2(env, exception_index, 0, 0, 0); + raise_interrupt2(env, exception_index, 0, 0, 0, 0); +} + +void raise_exception_ra(CPUX86State *env, int exception_index, uintptr_t retaddr) +{ + raise_interrupt2(env, exception_index, 0, 0, 0, retaddr); } |