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| author | Anthony Liguori <aliguori@us.ibm.com> | 2013-03-14 14:50:58 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-03-14 14:50:58 -0500 |
| commit | 3d34a4110c58bba120bc3d7c96c4b9571994c2a8 (patch) | |
| tree | 7bbd137a5886c67352f77ee11a94009ad4af52cd /target-lm32 | |
| parent | 0ec4a8e63ce5244cdb2aa8ef93427898e3f6631b (diff) | |
| parent | 0ad6773f1151c9e172b0b714aada78655dda4cf4 (diff) | |
| download | focaccia-qemu-3d34a4110c58bba120bc3d7c96c4b9571994c2a8.tar.gz focaccia-qemu-3d34a4110c58bba120bc3d7c96c4b9571994c2a8.zip | |
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
# By Andreas Färber (16) and Igor Mammedov (1) # Via Andreas Färber * afaerber/qom-cpu: target-lm32: Update VMStateDescription to LM32CPU target-arm: Override do_interrupt for ARMv7-M profile cpu: Replace do_interrupt() by CPUClass::do_interrupt method cpu: Pass CPUState to cpu_interrupt() exec: Pass CPUState to cpu_reset_interrupt() cpu: Move halted and interrupt_request fields to CPUState target-cris/helper.c: Update Coding Style target-i386: Update VMStateDescription to X86CPU cpu: Introduce cpu_class_set_vmsd() cpu: Register VMStateDescription through CPUState stubs: Add a vmstate_dummy struct for CONFIG_USER_ONLY vmstate: Make vmstate_register() static inline target-sh4: Move PVR/PRR/CVR into SuperHCPUClass target-sh4: Introduce SuperHCPU subclasses cpus: Replace open-coded CPU loop in qmp_memsave() with qemu_get_cpu() monitor: Use qemu_get_cpu() in monitor_set_cpu() cpu: Fix qemu_get_cpu() to return NULL if CPU not found
Diffstat (limited to 'target-lm32')
| -rw-r--r-- | target-lm32/cpu-qom.h | 6 | ||||
| -rw-r--r-- | target-lm32/cpu.c | 3 | ||||
| -rw-r--r-- | target-lm32/cpu.h | 7 | ||||
| -rw-r--r-- | target-lm32/helper.c | 5 | ||||
| -rw-r--r-- | target-lm32/machine.c | 25 | ||||
| -rw-r--r-- | target-lm32/op_helper.c | 4 |
6 files changed, 30 insertions, 20 deletions
diff --git a/target-lm32/cpu-qom.h b/target-lm32/cpu-qom.h index c0b6ce5897..957186075b 100644 --- a/target-lm32/cpu-qom.h +++ b/target-lm32/cpu-qom.h @@ -71,4 +71,10 @@ static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env) #define ENV_OFFSET offsetof(LM32CPU, env) +#ifndef CONFIG_USER_ONLY +extern const struct VMStateDescription vmstate_lm32_cpu; +#endif + +void lm32_cpu_do_interrupt(CPUState *cpu); + #endif diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index a2badb5701..bbb7fbf768 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -83,6 +83,9 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data) lcc->parent_reset = cc->reset; cc->reset = lm32_cpu_reset; + + cc->do_interrupt = lm32_cpu_do_interrupt; + cpu_class_set_vmsd(cc, &vmstate_lm32_cpu); } static const TypeInfo lm32_cpu_type_info = { diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h index 6948d0e248..fd50b534fc 100644 --- a/target-lm32/cpu.h +++ b/target-lm32/cpu.h @@ -189,7 +189,6 @@ struct CPULM32State { LM32CPU *cpu_lm32_init(const char *cpu_model); void cpu_lm32_list(FILE *f, fprintf_function cpu_fprintf); int cpu_lm32_exec(CPULM32State *s); -void do_interrupt(CPULM32State *env); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ @@ -212,8 +211,6 @@ static inline CPULM32State *cpu_init(const char *cpu_model) #define cpu_gen_code cpu_lm32_gen_code #define cpu_signal_handler cpu_lm32_signal_handler -#define CPU_SAVE_VERSION 1 - int cpu_lm32_handle_mmu_fault(CPULM32State *env, target_ulong address, int rw, int mmu_idx); #define cpu_handle_mmu_fault cpu_lm32_handle_mmu_fault @@ -254,9 +251,7 @@ static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc, static inline bool cpu_has_work(CPUState *cpu) { - CPULM32State *env = &LM32_CPU(cpu)->env; - - return env->interrupt_request & CPU_INTERRUPT_HARD; + return cpu->interrupt_request & CPU_INTERRUPT_HARD; } #include "exec/exec-all.h" diff --git a/target-lm32/helper.c b/target-lm32/helper.c index 47ae7e775a..a0a8399906 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -42,8 +42,11 @@ hwaddr cpu_get_phys_page_debug(CPULM32State *env, target_ulong addr) return addr & TARGET_PAGE_MASK; } -void do_interrupt(CPULM32State *env) +void lm32_cpu_do_interrupt(CPUState *cs) { + LM32CPU *cpu = LM32_CPU(cs); + CPULM32State *env = &cpu->env; + qemu_log_mask(CPU_LOG_INT, "exception at pc=%x type=%x\n", env->pc, env->exception_index); diff --git a/target-lm32/machine.c b/target-lm32/machine.c index 6802e818f8..9e0919c254 100644 --- a/target-lm32/machine.c +++ b/target-lm32/machine.c @@ -1,9 +1,9 @@ #include "hw/hw.h" #include "hw/boards.h" -static const VMStateDescription vmstate_cpu = { - .name = "cpu", - .version_id = CPU_SAVE_VERSION, +static const VMStateDescription vmstate_env = { + .name = "env", + .version_id = 1, .minimum_version_id = 1, .minimum_version_id_old = 1, .fields = (VMStateField[]) { @@ -22,12 +22,13 @@ static const VMStateDescription vmstate_cpu = { } }; -void cpu_save(QEMUFile *f, void *opaque) -{ - vmstate_save_state(f, &vmstate_cpu, opaque); -} - -int cpu_load(QEMUFile *f, void *opaque, int version_id) -{ - return vmstate_load_state(f, &vmstate_cpu, opaque, version_id); -} +const VMStateDescription vmstate_lm32_cpu = { + .name = "cpu", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField[]) { + VMSTATE_STRUCT(env, LM32CPU, 1, vmstate_env, CPULM32State), + VMSTATE_END_OF_LIST() + } +}; diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c index 53410b176e..ebc94a0681 100644 --- a/target-lm32/op_helper.c +++ b/target-lm32/op_helper.c @@ -25,7 +25,9 @@ void helper_raise_exception(CPULM32State *env, uint32_t index) void helper_hlt(CPULM32State *env) { - env->halted = 1; + CPUState *cs = CPU(lm32_env_get_cpu(env)); + + cs->halted = 1; env->exception_index = EXCP_HLT; cpu_loop_exit(env); } |