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authorAnthony Liguori <aliguori@us.ibm.com>2013-03-14 14:50:58 -0500
committerAnthony Liguori <aliguori@us.ibm.com>2013-03-14 14:50:58 -0500
commit3d34a4110c58bba120bc3d7c96c4b9571994c2a8 (patch)
tree7bbd137a5886c67352f77ee11a94009ad4af52cd /target-mips/cpu.c
parent0ec4a8e63ce5244cdb2aa8ef93427898e3f6631b (diff)
parent0ad6773f1151c9e172b0b714aada78655dda4cf4 (diff)
downloadfocaccia-qemu-3d34a4110c58bba120bc3d7c96c4b9571994c2a8.tar.gz
focaccia-qemu-3d34a4110c58bba120bc3d7c96c4b9571994c2a8.zip
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
# By Andreas Färber (16) and Igor Mammedov (1)
# Via Andreas Färber
* afaerber/qom-cpu:
  target-lm32: Update VMStateDescription to LM32CPU
  target-arm: Override do_interrupt for ARMv7-M profile
  cpu: Replace do_interrupt() by CPUClass::do_interrupt method
  cpu: Pass CPUState to cpu_interrupt()
  exec: Pass CPUState to cpu_reset_interrupt()
  cpu: Move halted and interrupt_request fields to CPUState
  target-cris/helper.c: Update Coding Style
  target-i386: Update VMStateDescription to X86CPU
  cpu: Introduce cpu_class_set_vmsd()
  cpu: Register VMStateDescription through CPUState
  stubs: Add a vmstate_dummy struct for CONFIG_USER_ONLY
  vmstate: Make vmstate_register() static inline
  target-sh4: Move PVR/PRR/CVR into SuperHCPUClass
  target-sh4: Introduce SuperHCPU subclasses
  cpus: Replace open-coded CPU loop in qmp_memsave() with qemu_get_cpu()
  monitor: Use qemu_get_cpu() in monitor_set_cpu()
  cpu: Fix qemu_get_cpu() to return NULL if CPU not found
Diffstat (limited to 'target-mips/cpu.c')
-rw-r--r--target-mips/cpu.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 4d62031c36..5315f7bda0 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -78,6 +78,8 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
 
     mcc->parent_reset = cc->reset;
     cc->reset = mips_cpu_reset;
+
+    cc->do_interrupt = mips_cpu_do_interrupt;
 }
 
 static const TypeInfo mips_cpu_type_info = {