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| author | Paul Burton <paul.burton@imgtec.com> | 2016-06-27 16:19:10 +0100 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2016-07-12 09:10:19 +0100 |
| commit | 2d72e7b047d800c9f99262466f65a98684ecca14 (patch) | |
| tree | 83f051701fadbd4214f0e23e46881df03c8dddc5 /target-mips/cpu.h | |
| parent | 6ec98bd7b64ad75870c8e9d87a90fcd1a64b4942 (diff) | |
| download | focaccia-qemu-2d72e7b047d800c9f99262466f65a98684ecca14.tar.gz focaccia-qemu-2d72e7b047d800c9f99262466f65a98684ecca14.zip | |
target-mips: change ASID type to hold more than 8 bits
ASID currently has uint8_t type which is too small since some processors support more than 8 bits ASID. Therefore change its type to uint16_t. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 6325e15bab..3e233ad639 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -19,7 +19,7 @@ typedef struct r4k_tlb_t r4k_tlb_t; struct r4k_tlb_t { target_ulong VPN; uint32_t PageMask; - uint8_t ASID; + uint16_t ASID; unsigned int G:1; unsigned int C0:3; unsigned int C1:3; |