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authorAnthony Liguori <anthony@codemonkey.ws>2013-09-03 12:33:32 -0500
committerAnthony Liguori <anthony@codemonkey.ws>2013-09-03 12:33:32 -0500
commitaaa6a40194e9f204cb853f64ef3c1e170bb014e8 (patch)
treed2cfe475e7bcdafdf50fa2cca72a1a0050794af8 /target-mips/op_helper.c
parentbb7d4d82b63bbde06c5584f94bfd9ba3b3e5ff3f (diff)
parent5e891bf8fd509c4d83cb95d352d88effb20720b1 (diff)
downloadfocaccia-qemu-aaa6a40194e9f204cb853f64ef3c1e170bb014e8.tar.gz
focaccia-qemu-aaa6a40194e9f204cb853f64ef3c1e170bb014e8.zip
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings / X86CPU

* Conversion of global CPU list to QTAILQ - preparing for CPU hot-unplug
* Document X86CPU magic numbers for CPUID cache info

# gpg: Signature made Tue 03 Sep 2013 10:59:22 AM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

# By Andreas Färber (3) and Eduardo Habkost (1)
# Via Andreas Färber
* afaerber/tags/qom-cpu-for-anthony:
  target-i386: Use #defines instead of magic numbers for CPUID cache info
  cpu: Replace qemu_for_each_cpu()
  cpu: Use QTAILQ for CPU list
  a15mpcore: Use qemu_get_cpu() for generic timers
Diffstat (limited to 'target-mips/op_helper.c')
-rw-r--r--target-mips/op_helper.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index b828375714..8e3a6d7da6 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1699,15 +1699,14 @@ target_ulong helper_dvpe(CPUMIPSState *env)
     CPUState *other_cs = first_cpu;
     target_ulong prev = env->mvp->CP0_MVPControl;
 
-    do {
+    CPU_FOREACH(other_cs) {
         MIPSCPU *other_cpu = MIPS_CPU(other_cs);
         /* Turn off all VPEs except the one executing the dvpe.  */
         if (&other_cpu->env != env) {
             other_cpu->env.mvp->CP0_MVPControl &= ~(1 << CP0MVPCo_EVP);
             mips_vpe_sleep(other_cpu);
         }
-        other_cs = other_cs->next_cpu;
-    } while (other_cs);
+    }
     return prev;
 }
 
@@ -1716,7 +1715,7 @@ target_ulong helper_evpe(CPUMIPSState *env)
     CPUState *other_cs = first_cpu;
     target_ulong prev = env->mvp->CP0_MVPControl;
 
-    do {
+    CPU_FOREACH(other_cs) {
         MIPSCPU *other_cpu = MIPS_CPU(other_cs);
 
         if (&other_cpu->env != env
@@ -1726,8 +1725,7 @@ target_ulong helper_evpe(CPUMIPSState *env)
             other_cpu->env.mvp->CP0_MVPControl |= (1 << CP0MVPCo_EVP);
             mips_vpe_wake(other_cpu); /* And wake it up.  */
         }
-        other_cs = other_cs->next_cpu;
-    } while (other_cs);
+    }
     return prev;
 }
 #endif /* !CONFIG_USER_ONLY */