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| author | Michael S. Tsirkin <mst@redhat.com> | 2011-06-14 17:51:11 +0300 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2011-06-15 18:27:15 +0300 |
| commit | befeac45d4d9afb587eca9a27d975db4a7950960 (patch) | |
| tree | aab24c856a3ea944e287d7f2591bb4bab6a56eb4 /target-mips/translate_init.c | |
| parent | 35f754620615138aaae0ef72602f84c88fd8de0f (diff) | |
| parent | 0b862cedf36d927818c50584ddd611b0370673df (diff) | |
| download | focaccia-qemu-befeac45d4d9afb587eca9a27d975db4a7950960.tar.gz focaccia-qemu-befeac45d4d9afb587eca9a27d975db4a7950960.zip | |
Merge remote-tracking branch 'origin/master' into pci
Conflicts: hw/virtio-pci.c
Diffstat (limited to 'target-mips/translate_init.c')
| -rw-r--r-- | target-mips/translate_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index 590e092a1d..d55c522bf3 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -38,7 +38,7 @@ ((1 << CP0C2_M)) /* No config4, no DSP ASE, no large physaddr (PABITS), - no external interrupt controller, no vectored interupts, + no external interrupt controller, no vectored interrupts, no 1kb pages, no SmartMIPS ASE, no trace logic */ #define MIPS_CONFIG3 \ ((0 << CP0C3_M) | (0 << CP0C3_DSPP) | (0 << CP0C3_LPA) | \ @@ -477,7 +477,7 @@ static const mips_def_t mips_defs[] = .CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU), .SYNCI_Step = 16, .CCRes = 2, - .CP0_Status_rw_bitmask = 0xF5D0FF1F, /*bit5:7 not writeable*/ + .CP0_Status_rw_bitmask = 0xF5D0FF1F, /*bit5:7 not writable*/ .CP1_fcr0 = (0x5 << FCR0_PRID) | (0x1 << FCR0_REV), .SEGBITS = 40, .PABITS = 40, |