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| author | Andreas Färber <afaerber@suse.de> | 2013-08-26 21:22:53 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2014-03-13 19:20:47 +0100 |
| commit | f0c3c505a8ec1a948006b3a16a35864a2270a84b (patch) | |
| tree | 063bbde0e88746c0add37f139990c60369fb1aca /target-openrisc | |
| parent | ff4700b05cfb305a880762c288b88ca01c782352 (diff) | |
| download | focaccia-qemu-f0c3c505a8ec1a948006b3a16a35864a2270a84b.tar.gz focaccia-qemu-f0c3c505a8ec1a948006b3a16a35864a2270a84b.zip | |
cpu: Move breakpoints field from CPU_COMMON to CPUState
Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc')
| -rw-r--r-- | target-openrisc/cpu.c | 6 | ||||
| -rw-r--r-- | target-openrisc/cpu.h | 1 | ||||
| -rw-r--r-- | target-openrisc/translate.c | 5 |
3 files changed, 9 insertions, 3 deletions
diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index b601de009c..a00369bef5 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -41,7 +41,11 @@ static void openrisc_cpu_reset(CPUState *s) occ->parent_reset(s); - memset(&cpu->env, 0, offsetof(CPUOpenRISCState, breakpoints)); +#ifndef CONFIG_USER_ONLY + memset(&cpu->env, 0, offsetof(CPUOpenRISCState, tlb)); +#else + memset(&cpu->env, 0, offsetof(CPUOpenRISCState, irq)); +#endif tlb_flush(&cpu->env, 1); /*tb_flush(&cpu->env); FIXME: Do we need it? */ diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 660bb4f1e7..4512f459bf 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -304,6 +304,7 @@ typedef struct CPUOpenRISCState { CPU_COMMON + /* Fields from here on are preserved across CPU reset. */ #ifndef CONFIG_USER_ONLY CPUOpenRISCTLBContext * tlb; diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 776cb6eece..852b5e6107 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -1619,10 +1619,11 @@ static void disas_openrisc_insn(DisasContext *dc, OpenRISCCPU *cpu) static void check_breakpoint(OpenRISCCPU *cpu, DisasContext *dc) { + CPUState *cs = CPU(cpu); CPUBreakpoint *bp; - if (unlikely(!QTAILQ_EMPTY(&cpu->env.breakpoints))) { - QTAILQ_FOREACH(bp, &cpu->env.breakpoints, entry) { + if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { + QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { if (bp->pc == dc->pc) { tcg_gen_movi_tl(cpu_pc, dc->pc); gen_exception(dc, EXCP_DEBUG); |