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| author | Aurelien Jarno <aurelien@aurel32.net> | 2013-03-22 21:43:57 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2013-03-22 21:43:57 +0100 |
| commit | d76bb73549fcac07524aea5135280ea533a94fd6 (patch) | |
| tree | 6c0939bd8f91d83061e7eb87bf8eee498bf542ff /target-ppc/mem_helper.c | |
| parent | 52ae646d4a3ebdcdcc973492c6a56f2c49b6578f (diff) | |
| parent | 9ca3f7f3160365de9030e1a6128a871625abe346 (diff) | |
| download | focaccia-qemu-d76bb73549fcac07524aea5135280ea533a94fd6.tar.gz focaccia-qemu-d76bb73549fcac07524aea5135280ea533a94fd6.zip | |
Merge branch 'ppc-for-upstream' of git://github.com/agraf/qemu
* 'ppc-for-upstream' of git://github.com/agraf/qemu: (58 commits)
target-ppc: Use NARROW_MODE macro for tlbie
target-ppc: Use NARROW_MODE macro for addresses
target-ppc: Use NARROW_MODE macro for comparisons
target-ppc: Use NARROW_MODE macro for branches
target-ppc: Fix add and subf carry generation in narrow mode
target-ppc: Use QOM method dispatch for MMU fault handling
target-ppc: Move ppc tlb_fill implementation into mmu_helper.c
target-ppc: Split user only code out of mmu_helper.c
mmu-hash64: Implement Virtual Page Class Key Protection
mmu-hash*: Merge translate and fault handling functions
mmu-hash*: Don't use full ppc_hash{32, 64}_translate() path for get_phys_page_debug()
mmu-hash*: Correctly mask RPN from hash PTE
mmu-hash*: Clean up real address calculation
mmu-hash*: Clean up PTE flags update
mmu-hash64: Factor SLB N bit into permissions bits
mmu-hash*: Clean up permission checking
mmu-hash32: Remove nx from context structure
mmu-hash*: Don't update PTE flags when permission is denied
mmu-hash32: Don't look up page tables on BAT permission error
mmu-hash32: Cleanup BAT lookup
...
Diffstat (limited to 'target-ppc/mem_helper.c')
| -rw-r--r-- | target-ppc/mem_helper.c | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c index ba383c8f11..9783e52b0c 100644 --- a/target-ppc/mem_helper.c +++ b/target-ppc/mem_helper.c @@ -252,41 +252,3 @@ STVE(stvewx, cpu_stl_data, bswap32, u32) #undef HI_IDX #undef LO_IDX - -/*****************************************************************************/ -/* Softmmu support */ -#if !defined(CONFIG_USER_ONLY) - -#define MMUSUFFIX _mmu - -#define SHIFT 0 -#include "exec/softmmu_template.h" - -#define SHIFT 1 -#include "exec/softmmu_template.h" - -#define SHIFT 2 -#include "exec/softmmu_template.h" - -#define SHIFT 3 -#include "exec/softmmu_template.h" - -/* try to fill the TLB and return an exception if error. If retaddr is - NULL, it means that the function was called in C code (i.e. not - from generated code or from helper.c) */ -/* XXX: fix it to restore all registers */ -void tlb_fill(CPUPPCState *env, target_ulong addr, int is_write, int mmu_idx, - uintptr_t retaddr) -{ - int ret; - - ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx); - if (unlikely(ret != 0)) { - if (likely(retaddr)) { - /* now we have a real cpu fault */ - cpu_restore_state(env, retaddr); - } - helper_raise_exception_err(env, env->exception_index, env->error_code); - } -} -#endif /* !CONFIG_USER_ONLY */ |