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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-05-19 15:55:08 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-05-19 15:55:08 +0100 |
| commit | 776efef32439a31cb13a6acfe8aab833687745ad (patch) | |
| tree | 8bb3579b495d9c5d19145041623dc10f6e2f8d18 /target-sparc/cpu.h | |
| parent | 8ec4fe0a4bed4fa27e6f28a746bcf77b27cd05a3 (diff) | |
| parent | df43d49cb8708b9c88a20afe0d1a3089b550a5b8 (diff) | |
| download | focaccia-qemu-776efef32439a31cb13a6acfe8aab833687745ad.tar.gz focaccia-qemu-776efef32439a31cb13a6acfe8aab833687745ad.zip | |
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
NEED_CPU_H cleanups, big enough to deserve their own pull request. # gpg: Signature made Thu 19 May 2016 15:42:37 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" * remotes/bonzini/tags/for-upstream: (52 commits) hw: clean up hw/hw.h includes hw: remove pio_addr_t cpu: move exec-all.h inclusion out of cpu.h exec: extract exec/tb-context.h hw: explicitly include qemu/log.h mips: move CP0 functions out of cpu.h arm: move arm_log_exception into .c file qemu-common: push cpu.h inclusion out of qemu-common.h acpi: do not use TARGET_PAGE_SIZE s390x: reorganize CSS bits between cpu.h and other headers dma: do not depend on kvm_enabled() gdbstub: remove unnecessary includes from gdbstub-xml.c qemu-common: stop including qemu/host-utils.h from qemu-common.h qemu-common: stop including qemu/bswap.h from qemu-common.h cpu: move endian-dependent load/store functions to cpu-all.h hw: cannot include hw/hw.h from user emulation hw: move CPU state serialization to migration/cpu.h hw: do not use VMSTATE_*TL include: poison symbols in osdep.h apic: move target-dependent definitions to cpu.h ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-sparc/cpu.h')
| -rw-r--r-- | target-sparc/cpu.h | 40 |
1 files changed, 37 insertions, 3 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 59ec7cafbe..ba37f4b94e 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -3,6 +3,7 @@ #include "qemu-common.h" #include "qemu/bswap.h" +#include "cpu-qom.h" #define ALIGNED_ONLY @@ -506,7 +507,42 @@ struct CPUSPARCState { uint32_t cache_control; }; -#include "cpu-qom.h" +/** + * SPARCCPU: + * @env: #CPUSPARCState + * + * A SPARC CPU. + */ +struct SPARCCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUSPARCState env; +}; + +static inline SPARCCPU *sparc_env_get_cpu(CPUSPARCState *env) +{ + return container_of(env, SPARCCPU, env); +} + +#define ENV_GET_CPU(e) CPU(sparc_env_get_cpu(e)) + +#define ENV_OFFSET offsetof(SPARCCPU, env) + +#ifndef CONFIG_USER_ONLY +extern const struct VMStateDescription vmstate_sparc_cpu; +#endif + +void sparc_cpu_do_interrupt(CPUState *cpu); +void sparc_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); +hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); +int sparc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); +int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu, + vaddr addr, int is_write, + int is_user, uintptr_t retaddr); #ifndef NO_CPU_IO_DEFS /* cpu_init.c */ @@ -732,6 +768,4 @@ static inline bool tb_am_enabled(int tb_flags) #endif } -#include "exec/exec-all.h" - #endif |