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authorAnthony Liguori <aliguori@us.ibm.com>2012-03-14 16:47:49 -0500
committerAnthony Liguori <aliguori@us.ibm.com>2012-03-14 16:47:49 -0500
commitaea6ff7fa07b046fb9f43d6262d6e34b77e8437e (patch)
treedd3043d1742273a95fa7fc5e99b8d5ffe0c710e5 /target-sparc/helper.c
parent9e4dd565b46749d5e6d5cf87bfd84f1917c68319 (diff)
parentdd83b06ae61cfa2dc4381ab49f365bd0995fc930 (diff)
downloadfocaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.tar.gz
focaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.zip
Merge remote-tracking branch 'afaerber/qom-cpu.v5' into staging
* afaerber/qom-cpu.v5: (43 commits)
  qom: Introduce CPU class
  Rename CPUState -> CPUArchState
  xtensa hw/: Don't use CPUState
  sparc hw/: Don't use CPUState
  sh4 hw/: Don't use CPUState
  s390x hw/: Don't use CPUState
  ppc hw/: Don't use CPUState
  mips hw/: Don't use CPUState
  microblaze hw/: Don't use CPUState
  m68k hw/: Don't use CPUState
  lm32 hw/: Don't use CPUState
  i386 hw/: Don't use CPUState
  cris hw/: Don't use CPUState
  arm hw/: Don't use CPUState
  alpha hw/: Don't use CPUState
  xtensa-semi: Don't use CPUState
  m68k-semi: Don't use CPUState
  arm-semi: Don't use CPUState
  target-xtensa: Don't overuse CPUState
  target-unicore32: Don't overuse CPUState
  ...
Diffstat (limited to 'target-sparc/helper.c')
-rw-r--r--target-sparc/helper.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 037a72ce4e..65e1740e19 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -22,13 +22,13 @@
 #include "helper.h"
 #include "sysemu.h"
 
-void helper_raise_exception(CPUState *env, int tt)
+void helper_raise_exception(CPUSPARCState *env, int tt)
 {
     env->exception_index = tt;
     cpu_loop_exit(env);
 }
 
-void helper_debug(CPUState *env)
+void helper_debug(CPUSPARCState *env)
 {
     env->exception_index = EXCP_DEBUG;
     cpu_loop_exit(env);
@@ -64,7 +64,7 @@ void helper_tick_set_limit(void *opaque, uint64_t limit)
 }
 #endif
 
-static target_ulong helper_udiv_common(CPUState *env, target_ulong a,
+static target_ulong helper_udiv_common(CPUSPARCState *env, target_ulong a,
                                        target_ulong b, int cc)
 {
     int overflow = 0;
@@ -92,17 +92,17 @@ static target_ulong helper_udiv_common(CPUState *env, target_ulong a,
     return x0;
 }
 
-target_ulong helper_udiv(CPUState *env, target_ulong a, target_ulong b)
+target_ulong helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b)
 {
     return helper_udiv_common(env, a, b, 0);
 }
 
-target_ulong helper_udiv_cc(CPUState *env, target_ulong a, target_ulong b)
+target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
 {
     return helper_udiv_common(env, a, b, 1);
 }
 
-static target_ulong helper_sdiv_common(CPUState *env, target_ulong a,
+static target_ulong helper_sdiv_common(CPUSPARCState *env, target_ulong a,
                                        target_ulong b, int cc)
 {
     int overflow = 0;
@@ -130,12 +130,12 @@ static target_ulong helper_sdiv_common(CPUState *env, target_ulong a,
     return x0;
 }
 
-target_ulong helper_sdiv(CPUState *env, target_ulong a, target_ulong b)
+target_ulong helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b)
 {
     return helper_sdiv_common(env, a, b, 0);
 }
 
-target_ulong helper_sdiv_cc(CPUState *env, target_ulong a, target_ulong b)
+target_ulong helper_sdiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b)
 {
     return helper_sdiv_common(env, a, b, 1);
 }