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authorLluís Vilanova <vilanova@ac.upc.edu>2016-02-25 17:43:15 +0100
committerStefan Hajnoczi <stefanha@redhat.com>2016-03-01 13:27:09 +0000
commit1bcea73e13b2b059d0cb3301aeaca43e5656ef57 (patch)
tree9251e3695700e6f5edff2293546365159b2b5ac8 /target-sparc
parent56797b1fbce86b3844cec753100a7260b9132a6e (diff)
downloadfocaccia-qemu-1bcea73e13b2b059d0cb3301aeaca43e5656ef57.tar.gz
focaccia-qemu-1bcea73e13b2b059d0cb3301aeaca43e5656ef57.zip
tcg: Add type for vCPU pointers
Adds the 'TCGv_env' type for pointers to 'CPUArchState' objects. The
tracing infrastructure later needs to differentiate between regular
pointers and pointers to vCPUs.

Also changes all targets to use the new 'TCGv_env' type instead of the
generic 'TCGv_ptr'. As of now, the change is merely cosmetic ('TCGv_env'
translates into 'TCGv_ptr'), but that could change in the future to
enforce the difference.

Note that a 'TCGv_env' type (for 'CPUState') is not added, since all
helpers currently receive the architecture-specific
pointer ('CPUArchState').

Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Acked-by: Richard Henderson <rth@twiddle.net>
Message-id: 145641859552.30295.7821536833590725201.stgit@localhost
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/translate.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 00d61ee16a..58572c34cf 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -39,7 +39,8 @@
                          according to jump_pc[T2] */
 
 /* global register indexes */
-static TCGv_ptr cpu_env, cpu_regwptr;
+static TCGv_env cpu_env;
+static TCGv_ptr cpu_regwptr;
 static TCGv cpu_cc_src, cpu_cc_src2, cpu_cc_dst;
 static TCGv_i32 cpu_cc_op;
 static TCGv_i32 cpu_psr;
@@ -2291,7 +2292,7 @@ static void gen_fmovq(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
 }
 
 #ifndef CONFIG_USER_ONLY
-static inline void gen_load_trap_state_at_tl(TCGv_ptr r_tsptr, TCGv_ptr cpu_env)
+static inline void gen_load_trap_state_at_tl(TCGv_ptr r_tsptr, TCGv_env cpu_env)
 {
     TCGv_i32 r_tl = tcg_temp_new_i32();