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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-03-22 15:32:23 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-06-10 07:03:34 -0700 |
| commit | 4f7c64b3819d559417615ed2b1d028ebc1a49580 (patch) | |
| tree | 73711ac46b7eea9b9fc5fea93c2ea43cb20f9bdf /target/arm/cpu.h | |
| parent | a40ec84ee2b02086e27fab78a152c20b09c723cf (diff) | |
| download | focaccia-qemu-4f7c64b3819d559417615ed2b1d028ebc1a49580.tar.gz focaccia-qemu-4f7c64b3819d559417615ed2b1d028ebc1a49580.zip | |
cpu: Define CPUArchState with typedef
For all targets, do this just before including exec/cpu-all.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index f8020b4823..ccf581a84c 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -29,8 +29,6 @@ /* ARM processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) -#define CPUArchState struct CPUARMState - #define EXCP_UDEF 1 /* undefined instruction */ #define EXCP_SWI 2 /* software interrupt */ #define EXCP_PREFETCH_ABORT 3 @@ -3127,6 +3125,8 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env) } } +typedef CPUARMState CPUArchState; + #include "exec/cpu-all.h" /* Bit usage in the TB flags field: bit 31 indicates whether we are |