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authorRichard Henderson <richard.henderson@linaro.org>2018-06-28 17:15:37 -0700
committerPeter Maydell <peter.maydell@linaro.org>2018-06-29 15:30:54 +0100
commit802abf4024d23e48d45373ac3f2b580124b54b47 (patch)
tree7136999d403e2c3581effd6801e5d01e734e8763 /target/arm/cpu.h
parent0b33968e7f4cf998f678b2d1a5be3d6f3f3513d8 (diff)
downloadfocaccia-qemu-802abf4024d23e48d45373ac3f2b580124b54b47.tar.gz
focaccia-qemu-802abf4024d23e48d45373ac3f2b580124b54b47.zip
target/arm: Add ID_ISAR6
This register was added to aa32 state by ARMv8.2.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180629001538.11415-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r--target/arm/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7ac909448e..e310ffc29d 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -813,6 +813,7 @@ struct ARMCPU {
     uint32_t id_isar3;
     uint32_t id_isar4;
     uint32_t id_isar5;
+    uint32_t id_isar6;
     uint64_t id_aa64pfr0;
     uint64_t id_aa64pfr1;
     uint64_t id_aa64dfr0;