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| author | Peter Maydell <peter.maydell@linaro.org> | 2022-05-05 19:39:49 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-05-19 16:19:02 +0100 |
| commit | 8c7e17ef389699fd392e8613e144816b90af3a3a (patch) | |
| tree | 5f5034e408f9392d7d38ec656413b4150b3b38fa /target/arm/cpu.h | |
| parent | 4a0b47c8150d3ac0a90f470191d64a3b199e6269 (diff) | |
| download | focaccia-qemu-8c7e17ef389699fd392e8613e144816b90af3a3a.tar.gz focaccia-qemu-8c7e17ef389699fd392e8613e144816b90af3a3a.zip | |
target/arm: Implement FEAT_S2FWB
Implement the handling of FEAT_S2FWB; the meat of this is in the new combined_attrs_fwb() function which combines S1 and S2 attributes when HCR_EL2.FWB is set. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220505183950.2781801-4-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 18ca61e8e2..98efc638bb 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3941,6 +3941,11 @@ static inline bool isar_feature_aa64_st(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, ST) != 0; } +static inline bool isar_feature_aa64_fwb(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, FWB) != 0; +} + static inline bool isar_feature_aa64_bti(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, BT) != 0; |