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authorRichard Henderson <richard.henderson@linaro.org>2021-04-19 13:22:29 -0700
committerPeter Maydell <peter.maydell@linaro.org>2021-04-30 11:16:50 +0100
commitae6eb1e9b3ccc211d96261a5c650e6650b508aa6 (patch)
tree2e4189d004e181beb8a777a258729a0e4eca7677 /target/arm/cpu.h
parent6a01eab7d823d8ae7430015e27922370f4bf9107 (diff)
downloadfocaccia-qemu-ae6eb1e9b3ccc211d96261a5c650e6650b508aa6.tar.gz
focaccia-qemu-ae6eb1e9b3ccc211d96261a5c650e6650b508aa6.zip
target/arm: Rename TBFLAG_ANY, PSTATE_SS
We're about to rearrange the macro expansion surrounding tbflags,
and this field name will be expanded using the bit definition of
the same name, resulting in a token pasting error.

So PSTATE_SS -> PSTATE__SS in the uses, and document it.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210419202257.161730-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r--target/arm/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 304e0a6af3..4cbf2db3e3 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3396,7 +3396,7 @@ typedef ARMCPU ArchCPU;
  */
 FIELD(TBFLAG_ANY, AARCH64_STATE, 31, 1)
 FIELD(TBFLAG_ANY, SS_ACTIVE, 30, 1)
-FIELD(TBFLAG_ANY, PSTATE_SS, 29, 1)     /* Not cached. */
+FIELD(TBFLAG_ANY, PSTATE__SS, 29, 1)    /* Not cached. */
 FIELD(TBFLAG_ANY, BE_DATA, 28, 1)
 FIELD(TBFLAG_ANY, MMUIDX, 24, 4)
 /* Target EL if we take a floating-point-disabled exception */