summary refs log tree commit diff stats
path: root/target/arm/cpu.h
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2025-07-04 08:19:37 -0600
committerPeter Maydell <peter.maydell@linaro.org>2025-07-04 15:52:21 +0100
commitd8ff459b4021a4fdbd3bf0c4311bb24868188f0d (patch)
tree50bc60343ac1cf4f03787096828559c3401418fa /target/arm/cpu.h
parent81123324a56fecce275a9995ddc1593e880b43ef (diff)
downloadfocaccia-qemu-d8ff459b4021a4fdbd3bf0c4311bb24868188f0d.tar.gz
focaccia-qemu-d8ff459b4021a4fdbd3bf0c4311bb24868188f0d.zip
target/arm: Add isar feature tests for SME2p1, SVE2p1
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250704142112.1018902-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r--target/arm/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7db97e8038..c6041a9357 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2211,6 +2211,7 @@ FIELD(ID_AA64ISAR2, SYSINSTR_128, 36, 4)
 FIELD(ID_AA64ISAR2, PRFMSLC, 40, 4)
 FIELD(ID_AA64ISAR2, RPRFM, 48, 4)
 FIELD(ID_AA64ISAR2, CSSC, 52, 4)
+FIELD(ID_AA64ISAR2, LUT, 56, 4)
 FIELD(ID_AA64ISAR2, ATS1A, 60, 4)
 
 FIELD(ID_AA64PFR0, EL0, 0, 4)