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authorPeter Maydell <peter.maydell@linaro.org>2017-09-07 13:54:53 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-09-07 13:54:53 +0100
commitecf5e8eae8b0b5fa41f00b53d67747b42fd1b8b9 (patch)
tree56930bb977234b0836ed9e57fba0622a1facd3d3 /target/arm/cpu.h
parent1bc04a8880374407c4b12d82ceb8752e12ff5336 (diff)
downloadfocaccia-qemu-ecf5e8eae8b0b5fa41f00b53d67747b42fd1b8b9.tar.gz
focaccia-qemu-ecf5e8eae8b0b5fa41f00b53d67747b42fd1b8b9.zip
target/arm: Make MPU_CTRL register banked for v8M
Make the MPU_CTRL register banked if v8M security extensions are
enabled.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1503414539-28762-16-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r--target/arm/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 425adc3e32..29ffb2643d 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -429,7 +429,7 @@ typedef struct CPUARMState {
         uint32_t dfsr; /* Debug Fault Status Register */
         uint32_t mmfar; /* MemManage Fault Address */
         uint32_t bfar; /* BusFault Address */
-        unsigned mpu_ctrl; /* MPU_CTRL */
+        unsigned mpu_ctrl[2]; /* MPU_CTRL */
         int exception;
         uint32_t primask[2];
         uint32_t faultmask[2];