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authorPeter Maydell <peter.maydell@linaro.org>2020-06-23 18:57:05 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-06-23 18:57:05 +0100
commitd4b78317b7cf8c0c635b70086503813f79ff21ec (patch)
treebab8d849b983bcc72e9680acf23470679fb9e251 /target/arm/cpu64.c
parentd88d5a3806d78dcfca648c62dae9d88d3e803bd2 (diff)
parent539533b85fbd269f777bed931de8ccae1dd837e9 (diff)
downloadfocaccia-qemu-d4b78317b7cf8c0c635b70086503813f79ff21ec.tar.gz
focaccia-qemu-d4b78317b7cf8c0c635b70086503813f79ff21ec.zip
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200623' into staging
target-arm queue:
 * util/oslib-posix : qemu_init_exec_dir implementation for Mac
 * target/arm: Last parts of neon decodetree conversion
 * hw/arm/virt: Add 5.0 HW compat props
 * hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock status
 * mps2: Add CMSDK APB watchdog, FPGAIO block, S2I devices and I2C devices
 * mps2: Add some unimplemented-device stubs for audio and GPIO
 * mps2-tz: Use the ARM SBCon two-wire serial bus interface
 * target/arm: Check supported KVM features globally (not per vCPU)
 * tests/qtest/arm-cpu-features: Add feature setting tests
 * arm/virt: Add memory hot remove support

# gpg: Signature made Tue 23 Jun 2020 12:38:31 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200623: (42 commits)
  arm/virt: Add memory hot remove support
  tests/qtest/arm-cpu-features: Add feature setting tests
  target/arm: Check supported KVM features globally (not per vCPU)
  hw/arm/mps2-tz: Use the ARM SBCon two-wire serial bus interface
  hw/arm/mps2: Add audio I2S interface as unimplemented device
  hw/arm/mps2: Add I2C devices
  hw/arm/mps2: Add SPI devices
  hw/arm/mps2: Map the FPGA I/O block
  hw/arm/mps2: Add CMSDK AHB GPIO peripherals as unimplemented devices
  hw/arm/mps2: Add CMSDK APB watchdog device
  hw/arm/mps2: Rename CMSDK AHB peripheral region
  hw/arm/mps2: Document CMSDK/FPGA APB subsystem sections
  hw/arm: Use TYPE_VERSATILE_I2C instead of hardcoded string
  hw/i2c: Add header for ARM SBCon two-wire serial bus interface
  hw/i2c/versatile_i2c: Add SCL/SDA definitions
  hw/i2c/versatile_i2c: Add definitions for register addresses
  hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock status
  target/arm: Remove dead code relating to SABA and UABA
  target/arm: Remove unnecessary gen_io_end() calls
  target/arm: Move some functions used only in translate-neon.inc.c to that file
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu64.c')
-rw-r--r--target/arm/cpu64.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 778cecc2e6..a0c1d8894b 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -266,7 +266,7 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
 
     /* Collect the set of vector lengths supported by KVM. */
     bitmap_zero(kvm_supported, ARM_MAX_VQ);
-    if (kvm_enabled() && kvm_arm_sve_supported(CPU(cpu))) {
+    if (kvm_enabled() && kvm_arm_sve_supported()) {
         kvm_arm_sve_get_vls(CPU(cpu), kvm_supported);
     } else if (kvm_enabled()) {
         assert(!cpu_isar_feature(aa64_sve, cpu));
@@ -473,7 +473,7 @@ static void cpu_max_set_sve_max_vq(Object *obj, Visitor *v, const char *name,
         return;
     }
 
-    if (kvm_enabled() && !kvm_arm_sve_supported(CPU(cpu))) {
+    if (kvm_enabled() && !kvm_arm_sve_supported()) {
         error_setg(errp, "cannot set sve-max-vq");
         error_append_hint(errp, "SVE not supported by KVM on this host\n");
         return;
@@ -519,7 +519,7 @@ static void cpu_arm_set_sve_vq(Object *obj, Visitor *v, const char *name,
         return;
     }
 
-    if (value && kvm_enabled() && !kvm_arm_sve_supported(CPU(cpu))) {
+    if (value && kvm_enabled() && !kvm_arm_sve_supported()) {
         error_setg(errp, "cannot enable %s", name);
         error_append_hint(errp, "SVE not supported by KVM on this host\n");
         return;
@@ -556,7 +556,7 @@ static void cpu_arm_set_sve(Object *obj, Visitor *v, const char *name,
         return;
     }
 
-    if (value && kvm_enabled() && !kvm_arm_sve_supported(CPU(cpu))) {
+    if (value && kvm_enabled() && !kvm_arm_sve_supported()) {
         error_setg(errp, "'sve' feature not supported by KVM on this host");
         return;
     }
@@ -751,7 +751,7 @@ static void aarch64_cpu_set_aarch64(Object *obj, bool value, Error **errp)
      * uniform execution state like do_interrupt.
      */
     if (value == false) {
-        if (!kvm_enabled() || !kvm_arm_aarch32_supported(CPU(cpu))) {
+        if (!kvm_enabled() || !kvm_arm_aarch32_supported()) {
             error_setg(errp, "'aarch64' feature cannot be disabled "
                              "unless KVM is enabled and 32-bit EL1 "
                              "is supported");