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| author | Peter Maydell <peter.maydell@linaro.org> | 2023-04-20 10:21:16 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-04-20 10:21:16 +0100 |
| commit | dd17143fcecdc2b8845de1b0c251fa4e49b0f572 (patch) | |
| tree | ef02cee59af046fd5c0d69126ba3918d7c9c2361 /target/arm/cpu64.c | |
| parent | a3856808d9e687fce071ffca223daeb88c760854 (diff) | |
| download | focaccia-qemu-dd17143fcecdc2b8845de1b0c251fa4e49b0f572.tar.gz focaccia-qemu-dd17143fcecdc2b8845de1b0c251fa4e49b0f572.zip | |
target/arm: Implement FEAT_PAN3
FEAT_PAN3 adds an EPAN bit to SCTLR_EL1 and SCTLR_EL2, which allows the PAN bit to make memory non-privileged-read/write if it is user-executable as well as if it is user-read/write. Implement this feature and enable it in the AArch64 'max' CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230331145045.2584941-4-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu64.c')
| -rw-r--r-- | target/arm/cpu64.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 0fb07cc7b6..735ca54163 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -1302,7 +1302,7 @@ static void aarch64_max_initfn(Object *obj) t = FIELD_DP64(t, ID_AA64MMFR1, VH, 1); /* FEAT_VHE */ t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* FEAT_HPDS */ t = FIELD_DP64(t, ID_AA64MMFR1, LO, 1); /* FEAT_LOR */ - t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* FEAT_PAN2 */ + t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 3); /* FEAT_PAN3 */ t = FIELD_DP64(t, ID_AA64MMFR1, XNX, 1); /* FEAT_XNX */ t = FIELD_DP64(t, ID_AA64MMFR1, ETS, 1); /* FEAT_ETS */ t = FIELD_DP64(t, ID_AA64MMFR1, HCX, 1); /* FEAT_HCX */ |