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| author | Jinjie Ruan <ruanjinjie@huawei.com> | 2024-04-19 14:32:56 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-04-25 10:21:04 +0100 |
| commit | 2b0d2ab895022814da13127e47c17890690488da (patch) | |
| tree | ac4edd53cbd61046ccedbb6436ec2b7ed7d09e0d /target/arm/helper.c | |
| parent | 5da72194df36535d773c8bdc951529ecd5e31707 (diff) | |
| download | focaccia-qemu-2b0d2ab895022814da13127e47c17890690488da.tar.gz focaccia-qemu-2b0d2ab895022814da13127e47c17890690488da.zip | |
target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI
FEAT_NMI defines another three new bits in HCRX_EL2: TALLINT, HCRX_VINMI and HCRX_VFNMI. When the feature is enabled, allow these bits to be written in HCRX_EL2. Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-2-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/helper.c')
| -rw-r--r-- | target/arm/helper.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index a620481d7c..7a25ea65c9 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6187,13 +6187,19 @@ bool el_is_in_host(CPUARMState *env, int el) static void hcrx_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { + ARMCPU *cpu = env_archcpu(env); uint64_t valid_mask = 0; /* FEAT_MOPS adds MSCEn and MCE2 */ - if (cpu_isar_feature(aa64_mops, env_archcpu(env))) { + if (cpu_isar_feature(aa64_mops, cpu)) { valid_mask |= HCRX_MSCEN | HCRX_MCE2; } + /* FEAT_NMI adds TALLINT, VINMI and VFNMI */ + if (cpu_isar_feature(aa64_nmi, cpu)) { + valid_mask |= HCRX_TALLINT | HCRX_VINMI | HCRX_VFNMI; + } + /* Clear RES0 bits. */ env->cp15.hcrx_el2 = value & valid_mask; } |