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authorRichard Henderson <richard.henderson@linaro.org>2025-09-16 07:22:31 -0700
committerPeter Maydell <peter.maydell@linaro.org>2025-09-25 15:56:26 +0100
commit5bd746e212b0fac12cfe7332a0bb95e4b7276f53 (patch)
tree4f363b43d3a45e7b74cacd251995d500d128e2b2 /target/arm/helper.c
parent415e21ac85d5209768f77cda2eef24d3da3deaa9 (diff)
downloadfocaccia-qemu-5bd746e212b0fac12cfe7332a0bb95e4b7276f53.tar.gz
focaccia-qemu-5bd746e212b0fac12cfe7332a0bb95e4b7276f53.zip
target/arm: Move endianness fixup for 32-bit registers
Move the test outside of the banked register block,
and repeat the AA32 test.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/helper.c')
-rw-r--r--target/arm/helper.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 4063c8a0b6..18066b0c5d 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7438,15 +7438,22 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, ARMCPRegInfo *r,
                  */
                 r->type |= ARM_CP_ALIAS;
             }
-
-            if (HOST_BIG_ENDIAN &&
-                r->state == ARM_CP_STATE_BOTH && r->fieldoffset) {
-                r->fieldoffset += sizeof(uint32_t);
-            }
         }
     }
 
     /*
+     * For 32-bit AArch32 regs shared with 64-bit AArch64 regs,
+     * adjust the field offset for endianness.  This had to be
+     * delayed until banked registers were resolved.
+     */
+    if (HOST_BIG_ENDIAN &&
+        state == ARM_CP_STATE_AA32 &&
+        r->state == ARM_CP_STATE_BOTH &&
+        r->fieldoffset) {
+        r->fieldoffset += sizeof(uint32_t);
+    }
+
+    /*
      * Special registers (ie NOP/WFI) are never migratable and
      * are not even raw-accessible.
      */