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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-10-24 07:50:17 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-10-24 07:51:32 +0100 |
| commit | 81e3728407bf4a12f83e14fd410d5f0a7d29b5b4 (patch) | |
| tree | 1dac76b06de410544ac50d4696508504cbb89f11 /target/arm/helper.c | |
| parent | 5763190fa8705863b4b725aa1657661a97113eb4 (diff) | |
| download | focaccia-qemu-81e3728407bf4a12f83e14fd410d5f0a7d29b5b4.tar.gz focaccia-qemu-81e3728407bf4a12f83e14fd410d5f0a7d29b5b4.zip | |
target/arm: Improve debug logging of AArch32 exception return
For AArch32, exception return happens through certain kinds of CPSR write. We don't currently have any CPU_LOG_INT logging of these events (unlike AArch64, where we log in the ERET instruction). Add some suitable logging. This will log exception returns like this: Exception return from AArch32 hyp to usr PC 0x80100374 paralleling the existing logging in the exception_return helper for AArch64 exception returns: Exception return from AArch64 EL2 to AArch64 EL0 PC 0x8003045c Exception return from AArch64 EL2 to AArch32 EL0 PC 0x8003045c (Note that an AArch32 exception return can only be AArch32->AArch32, never to AArch64.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181012144235.19646-2-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/helper.c')
| -rw-r--r-- | target/arm/helper.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 6334d1ff71..56e4b18ddb 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6208,7 +6208,17 @@ void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask, mask |= CPSR_IL; val |= CPSR_IL; } + qemu_log_mask(LOG_GUEST_ERROR, + "Illegal AArch32 mode switch attempt from %s to %s\n", + aarch32_mode_name(env->uncached_cpsr), + aarch32_mode_name(val)); } else { + qemu_log_mask(CPU_LOG_INT, "%s %s to %s PC 0x%" PRIx32 "\n", + write_type == CPSRWriteExceptionReturn ? + "Exception return from AArch32" : + "AArch32 mode switch from", + aarch32_mode_name(env->uncached_cpsr), + aarch32_mode_name(val), env->regs[15]); switch_mode(env, val & CPSR_M); } } |