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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-07-18 13:46:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-07-18 13:46:39 +0100 |
| commit | fd79f89c76c8e2f409dd9db5d7a367b1f64b6dc6 (patch) | |
| tree | e67b50f02591b71681d33d2c5ba6964a29776458 /target/arm/helper.c | |
| parent | a97fca4ceb9d9b10aa8b582e817a5ee6c42ffbaf (diff) | |
| parent | 8fe612a183dec4c63afdc57537079bc742d024ca (diff) | |
| download | focaccia-qemu-fd79f89c76c8e2f409dd9db5d7a367b1f64b6dc6.tar.gz focaccia-qemu-fd79f89c76c8e2f409dd9db5d7a367b1f64b6dc6.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210718' into staging
target-arm queue: * Remove duplicate 'plus1' function from Neon and SVE decode * Fix offsets for TTBCR for big-endian hosts * docs: fix copyright date * docs: add license/version info to HTML footers * docs: add an About section * docs: document some more arm boards # gpg: Signature made Sun 18 Jul 2021 13:45:22 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210718: target/arm: Remove duplicate 'plus1' function from Neon and SVE decode docs: Add skeletal documentation of highbank and midway docs: Add skeletal documentation of the emcraft-sf2 docs: Add skeletal documentation of cubieboard docs: Add QEMU version information to HTML footer docs: Add license note to the HTML page footer docs: Add some actual About text to about/index.rst docs: Move deprecation, build and license info out of system/ docs: Remove "Contents:" lines from top-level subsections docs: Stop calling the top level subsections of our manual 'manuals' docs: Fix documentation Copyright date target/arm: Fix offsets for TTBCR Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/helper.c')
| -rw-r--r-- | target/arm/helper.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 910ace4274..0c07ca9837 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4106,8 +4106,9 @@ static const ARMCPRegInfo vmsa_cp_reginfo[] = { .access = PL1_RW, .accessfn = access_tvm_trvm, .type = ARM_CP_ALIAS, .writefn = vmsa_ttbcr_write, .raw_writefn = vmsa_ttbcr_raw_write, - .bank_fieldoffsets = { offsetoflow32(CPUARMState, cp15.tcr_el[3]), - offsetoflow32(CPUARMState, cp15.tcr_el[1])} }, + /* No offsetoflow32 -- pass the entire TCR to writefn/raw_writefn. */ + .bank_fieldoffsets = { offsetof(CPUARMState, cp15.tcr_el[3]), + offsetof(CPUARMState, cp15.tcr_el[1])} }, REGINFO_SENTINEL }; @@ -4118,8 +4119,10 @@ static const ARMCPRegInfo ttbcr2_reginfo = { .name = "TTBCR2", .cp = 15, .opc1 = 0, .crn = 2, .crm = 0, .opc2 = 3, .access = PL1_RW, .accessfn = access_tvm_trvm, .type = ARM_CP_ALIAS, - .bank_fieldoffsets = { offsetofhigh32(CPUARMState, cp15.tcr_el[3]), - offsetofhigh32(CPUARMState, cp15.tcr_el[1]) }, + .bank_fieldoffsets = { + offsetofhigh32(CPUARMState, cp15.tcr_el[3].raw_tcr), + offsetofhigh32(CPUARMState, cp15.tcr_el[1].raw_tcr), + }, }; static void omap_ticonfig_write(CPUARMState *env, const ARMCPRegInfo *ri, |