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| author | Claudio Fontana <cfontana@suse.de> | 2021-02-04 17:39:23 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-02-05 10:24:15 -1000 |
| commit | 78271684719f34c1cc19f895e089f2f19b69698d (patch) | |
| tree | 5f47406eb8c2be4e37e411e5053678e4d91e09d3 /target/arm/internals.h | |
| parent | c73bdb35a91fb6b17c2c93b1ba381fc88a406f8d (diff) | |
| download | focaccia-qemu-78271684719f34c1cc19f895e089f2f19b69698d.tar.gz focaccia-qemu-78271684719f34c1cc19f895e089f2f19b69698d.zip | |
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
we cannot in principle make the TCG Operations field definitions conditional on CONFIG_TCG in code that is included by both common_ss and specific_ss modules. Therefore, what we can do safely to restrict the TCG fields to TCG-only builds, is to move all tcg cpu operations into a separate header file, which is only included by TCG, target-specific code. This leaves just a NULL pointer in the cpu.h for the non-TCG builds. This also tidies up the code in all targets a bit, having all TCG cpu operations neatly contained by a dedicated data struct. Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210204163931.7358-16-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm/internals.h')
| -rw-r--r-- | target/arm/internals.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h index 853fa88fd6..448982dd2f 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -171,6 +171,12 @@ static inline int r14_bank_number(int mode) void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu); void arm_translate_init(void); +#ifdef CONFIG_TCG +void arm_cpu_synchronize_from_tb(CPUState *cs, + const struct TranslationBlock *tb); +#endif /* CONFIG_TCG */ + + enum arm_fprounding { FPROUNDING_TIEEVEN, FPROUNDING_POSINF, |