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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-08-31 09:45:14 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-08-31 09:45:14 +0100 |
| commit | 851ec6eba56d0153574c042bff05a3d0f235a00e (patch) | |
| tree | 8f28ffb5276c55c6214fdd300a8df395dfa2f1dd /target/arm/internals.h | |
| parent | ae4acc696f34bf0cb8865521c16ff378b19915b3 (diff) | |
| download | focaccia-qemu-851ec6eba56d0153574c042bff05a3d0f235a00e.tar.gz focaccia-qemu-851ec6eba56d0153574c042bff05a3d0f235a00e.zip | |
target/arm: Allow cpu to configure GM blocksize
Previously we hard-coded the blocksize with GMID_EL1_BS. But the value we choose for -cpu max does not match the value that cortex-a710 uses. Mirror the way we handle dcz_blocksize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230811214031.171020-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/internals.h')
| -rw-r--r-- | target/arm/internals.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h index cf13bb94f5..5f5393b25c 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1247,12 +1247,6 @@ void arm_log_exception(CPUState *cs); #endif /* !CONFIG_USER_ONLY */ /* - * The log2 of the words in the tag block, for GMID_EL1.BS. - * The is the maximum, 256 bytes, which manipulates 64-bits of tags. - */ -#define GMID_EL1_BS 6 - -/* * SVE predicates are 1/8 the size of SVE vectors, and cannot use * the same simd_desc() encoding due to restrictions on size. * Use these instead. |