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authorPeter Maydell <peter.maydell@linaro.org>2025-08-28 15:04:19 +0100
committerPeter Maydell <peter.maydell@linaro.org>2025-09-16 17:31:53 +0100
commitcdafe5bd90eef82bec798029ad5669bf2ee15023 (patch)
tree9634e09558b2eb452df941106183514c5545b5fd /target/arm/tcg/hflags.c
parent5b3764d9e30627853c5b9171925c51232e56a293 (diff)
downloadfocaccia-qemu-cdafe5bd90eef82bec798029ad5669bf2ee15023.tar.gz
focaccia-qemu-cdafe5bd90eef82bec798029ad5669bf2ee15023.zip
target/arm: Remove XScale and iWMMXt translate.c code
Remove all the translator code that is accessible only via
ARM_FEATURE_XSCALE or ARM_FEATURE_IWMMXT.  This includes the
xscale-only cp15_cpar TB flags and cpu_{V0,V1,M0} TCG temps.

The no-longer-used helper functions will be removed in a separate
commit.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250828140422.3271703-3-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/tcg/hflags.c')
-rw-r--r--target/arm/tcg/hflags.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/target/arm/tcg/hflags.c b/target/arm/tcg/hflags.c
index 59ab526375..01894226cc 100644
--- a/target/arm/tcg/hflags.c
+++ b/target/arm/tcg/hflags.c
@@ -624,16 +624,9 @@ TCGTBCPUState arm_get_tb_cpu_state(CPUState *cs)
                 DP_TBFLAG_M32(flags, MVE_NO_PRED, 1);
             }
         } else {
-            /*
-             * Note that XSCALE_CPAR shares bits with VECSTRIDE.
-             * Note that VECLEN+VECSTRIDE are RES0 for M-profile.
-             */
-            if (arm_feature(env, ARM_FEATURE_XSCALE)) {
-                DP_TBFLAG_A32(flags, XSCALE_CPAR, env->cp15.c15_cpar);
-            } else {
-                DP_TBFLAG_A32(flags, VECLEN, env->vfp.vec_len);
-                DP_TBFLAG_A32(flags, VECSTRIDE, env->vfp.vec_stride);
-            }
+            /* Note that VECLEN+VECSTRIDE are RES0 for M-profile. */
+            DP_TBFLAG_A32(flags, VECLEN, env->vfp.vec_len);
+            DP_TBFLAG_A32(flags, VECSTRIDE, env->vfp.vec_stride);
             if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)) {
                 DP_TBFLAG_A32(flags, VFPEN, 1);
             }