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authorPeter Maydell <peter.maydell@linaro.org>2022-12-17 14:12:52 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-12-17 14:12:52 +0000
commit55745005e90a9deabd3d7900e13fc850f26f9d62 (patch)
treec9218bd598fd2a7644b27a03c0c05dbed5c1f62d /target/avr/cpu.c
parentd038d2645acabf6f52fd61baeaa021c3ebe97714 (diff)
parenta0c2e80afc98a9771b109eb5ce0b47edd7c78155 (diff)
downloadfocaccia-qemu-55745005e90a9deabd3d7900e13fc850f26f9d62.tar.gz
focaccia-qemu-55745005e90a9deabd3d7900e13fc850f26f9d62.zip
Merge tag 'pull-target-arm-20221216' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
reset refactoring queue:
 * remove uses of qdev_reset_all(), qbus_reset_all(), device_legacy_reset()
 * convert various devices to 3-phase reset, so we can remove their
   uses of device_class_set_parent_reset()

# gpg: Signature made Fri 16 Dec 2022 21:41:11 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20221216' of https://git.linaro.org/people/pmaydell/qemu-arm: (36 commits)
  hw/pci-host/pnv_phb3_msi: Convert TYPE_PHB3_MSI to 3-phase reset
  hw/intc/xics: Convert TYPE_ICS to 3-phase reset
  hw/intc/xics: Reset TYPE_ICS objects with device_cold_reset()
  pci: Convert child classes of TYPE_PCIE_ROOT_PORT to 3-phase reset
  pci: Convert TYPE_PCIE_ROOT_PORT to 3-phase reset
  hw/display/virtio-vga: Convert TYPE_VIRTIO_VGA_BASE to 3-phase reset
  hw/virtio: Convert TYPE_VIRTIO_PCI to 3-phase reset
  target/xtensa: Convert to 3-phase reset
  target/tricore: Convert to 3-phase reset
  target/sparc: Convert to 3-phase reset
  target/sh4: Convert to 3-phase reset
  target/rx: Convert to 3-phase reset
  target/riscv: Convert to 3-phase reset
  target/ppc: Convert to 3-phase reset
  target/openrisc: Convert to 3-phase reset
  target/nios2: Convert to 3-phase reset
  target/mips: Convert to 3-phase reset
  target/microblaze: Convert to 3-phase reset
  target/m68k: Convert to 3-phase reset
  target/loongarch: Convert to 3-phase reset
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/avr/cpu.c')
-rw-r--r--target/avr/cpu.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index c7295b488d..d0139804b9 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -67,14 +67,16 @@ static void avr_restore_state_to_opc(CPUState *cs,
     env->pc_w = data[0];
 }
 
-static void avr_cpu_reset(DeviceState *ds)
+static void avr_cpu_reset_hold(Object *obj)
 {
-    CPUState *cs = CPU(ds);
+    CPUState *cs = CPU(obj);
     AVRCPU *cpu = AVR_CPU(cs);
     AVRCPUClass *mcc = AVR_CPU_GET_CLASS(cpu);
     CPUAVRState *env = &cpu->env;
 
-    mcc->parent_reset(ds);
+    if (mcc->parent_phases.hold) {
+        mcc->parent_phases.hold(obj);
+    }
 
     env->pc_w = 0;
     env->sregI = 1;
@@ -223,9 +225,12 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
     DeviceClass *dc = DEVICE_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
     AVRCPUClass *mcc = AVR_CPU_CLASS(oc);
+    ResettableClass *rc = RESETTABLE_CLASS(oc);
 
     device_class_set_parent_realize(dc, avr_cpu_realizefn, &mcc->parent_realize);
-    device_class_set_parent_reset(dc, avr_cpu_reset, &mcc->parent_reset);
+
+    resettable_class_set_parent_phases(rc, NULL, avr_cpu_reset_hold, NULL,
+                                       &mcc->parent_phases);
 
     cc->class_by_name = avr_cpu_class_by_name;