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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2025-04-05 18:13:20 +0200
committerRichard Henderson <richard.henderson@linaro.org>2025-04-23 15:07:32 -0700
commita3d40b5effafdd299d1850f0c9956f60199b5b56 (patch)
tree18c575a1cbf9c04d5b5420bf5fbde9ca9d6621f4 /target/avr/cpu.c
parenta522b04bb9cf67789116ad7a6165946d4b214bac (diff)
downloadfocaccia-qemu-a3d40b5effafdd299d1850f0c9956f60199b5b56.tar.gz
focaccia-qemu-a3d40b5effafdd299d1850f0c9956f60199b5b56.zip
tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition,
have each target set the 'mttcg_supported' field in the TCGCPUOps
structure.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250405161320.76854-17-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/avr/cpu.c')
-rw-r--r--target/avr/cpu.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 8f79cf4c08..84f3b839c9 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -225,6 +225,7 @@ static const struct SysemuCPUOps avr_sysemu_ops = {
 
 static const TCGCPUOps avr_tcg_ops = {
     .guest_default_memory_order = 0,
+    .mttcg_supported = false,
     .initialize = avr_cpu_tcg_init,
     .translate_code = avr_cpu_translate_code,
     .synchronize_from_tb = avr_cpu_synchronize_from_tb,