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authorAkihiko Odaki <akihiko.odaki@daynix.com>2024-02-27 14:43:18 +0000
committerAlex Bennée <alex.bennee@linaro.org>2024-02-28 09:09:58 +0000
commitecd6f6a8820c8fa91e4d96c1bb640913bd856343 (patch)
tree6e19dc3d6d42c39bfd11781ebf69d73225d59702 /target/avr/cpu.c
parentee59fa1dd57bac8ba8c81e02f2710ba08d1aa49d (diff)
downloadfocaccia-qemu-ecd6f6a8820c8fa91e4d96c1bb640913bd856343.tar.gz
focaccia-qemu-ecd6f6a8820c8fa91e4d96c1bb640913bd856343.zip
gdbstub: Infer number of core registers from XML
GDBFeature has the num_regs member so use it where applicable to
remove magic numbers.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20231213-gdb-v17-8-777047380591@daynix.com>
[AJB: remove core reg check from microblaze read reg]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240227144335.1196131-13-alex.bennee@linaro.org>
Diffstat (limited to 'target/avr/cpu.c')
-rw-r--r--target/avr/cpu.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index a40f445af2..a50170bc69 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -251,7 +251,6 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
     cc->gdb_read_register = avr_cpu_gdb_read_register;
     cc->gdb_write_register = avr_cpu_gdb_write_register;
     cc->gdb_adjust_breakpoint = avr_cpu_gdb_adjust_breakpoint;
-    cc->gdb_num_core_regs = 35;
     cc->gdb_core_xml_file = "avr-cpu.xml";
     cc->tcg_ops = &avr_tcg_ops;
 }