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| author | Taylor Simpson <tsimpson@quicinc.com> | 2023-04-27 16:00:01 -0700 |
|---|---|---|
| committer | Taylor Simpson <tsimpson@quicinc.com> | 2023-05-18 12:40:52 -0700 |
| commit | b9f0326bf7f584227dd10cbf5222e49130c7fc86 (patch) | |
| tree | 657bb93c6b0c77cd8a9f847a17663a6ffadb7dc3 /target/hexagon/hex_common.py | |
| parent | 71ed3697250e284e353b7abe05f667c5d6b9bc1b (diff) | |
| download | focaccia-qemu-b9f0326bf7f584227dd10cbf5222e49130c7fc86.tar.gz focaccia-qemu-b9f0326bf7f584227dd10cbf5222e49130c7fc86.zip | |
Hexagon (target/hexagon) Mark registers as read during packet analysis
Have gen_analyze_funcs mark the registers that are read by the instruction. We also mark the implicit reads using instruction attributes. Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230427230012.3800327-11-tsimpson@quicinc.com>
Diffstat (limited to 'target/hexagon/hex_common.py')
| -rwxr-xr-x | target/hexagon/hex_common.py | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py index 40f28ca933..232c6e2c20 100755 --- a/target/hexagon/hex_common.py +++ b/target/hexagon/hex_common.py @@ -97,6 +97,12 @@ def calculate_attribs(): add_qemu_macro_attrib("fSET_LPCFG", "A_IMPLICIT_WRITES_USR") add_qemu_macro_attrib("fLOAD", "A_SCALAR_LOAD") add_qemu_macro_attrib("fSTORE", "A_SCALAR_STORE") + add_qemu_macro_attrib('fLSBNEW0', 'A_IMPLICIT_READS_P0') + add_qemu_macro_attrib('fLSBNEW0NOT', 'A_IMPLICIT_READS_P0') + add_qemu_macro_attrib('fREAD_P0', 'A_IMPLICIT_READS_P0') + add_qemu_macro_attrib('fLSBNEW1', 'A_IMPLICIT_READS_P1') + add_qemu_macro_attrib('fLSBNEW1NOT', 'A_IMPLICIT_READS_P1') + add_qemu_macro_attrib('fREAD_P3', 'A_IMPLICIT_READS_P3') # Recurse down macros, find attributes from sub-macros macroValues = list(macros.values()) |