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authorPaolo Bonzini <pbonzini@redhat.com>2019-11-13 15:54:35 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2019-11-19 10:00:36 +0100
commit7f7a585d5bd3c7f1275d28c77d9d67513c1de36c (patch)
tree281c29e358c1061226fcc4e517d928cd31763504 /target/i386/cpu.c
parentc3157b74c47f886f99df752500f7cf76e7a287dd (diff)
downloadfocaccia-qemu-7f7a585d5bd3c7f1275d28c77d9d67513c1de36c.tar.gz
focaccia-qemu-7f7a585d5bd3c7f1275d28c77d9d67513c1de36c.zip
target/i386: add PSCHANGE_NO bit for the ARCH_CAPABILITIES MSR
This is required to disable ITLB multihit mitigations in nested
hypervisors.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.c')
-rw-r--r--target/i386/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index a624163ac2..2f60df37c4 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1204,7 +1204,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
         .type = MSR_FEATURE_WORD,
         .feat_names = {
             "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
-            "ssb-no", "mds-no", NULL, NULL,
+            "ssb-no", "mds-no", "pschange-mc-no", NULL,
             NULL, NULL, NULL, NULL,
             NULL, NULL, NULL, NULL,
             NULL, NULL, NULL, NULL,