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authorSean Christopherson <sean.j.christopherson@intel.com>2021-07-19 19:21:18 +0800
committerPaolo Bonzini <pbonzini@redhat.com>2021-09-30 14:50:20 +0200
commitdca6cffc550a3243ba8d106dd02b411342e58782 (patch)
treebfb611a85a78dbdeead6cc41f28bd4a8bde5cde1 /target/i386/cpu.c
parentb9edbadefb9ecbb1b1754c86ba7d1d7ce3e876aa (diff)
downloadfocaccia-qemu-dca6cffc550a3243ba8d106dd02b411342e58782.tar.gz
focaccia-qemu-dca6cffc550a3243ba8d106dd02b411342e58782.zip
Adjust min CPUID level to 0x12 when SGX is enabled
SGX capabilities are enumerated through CPUID_0x12.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112136.57018-16-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.c')
-rw-r--r--target/i386/cpu.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index de58599a3d..cacec605bf 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6154,6 +6154,11 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
         if (sev_enabled()) {
             x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F);
         }
+
+        /* SGX requires CPUID[0x12] for EPC enumeration */
+        if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) {
+            x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12);
+        }
     }
 
     /* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */