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| author | Paolo Bonzini <pbonzini@redhat.com> | 2023-10-10 10:31:17 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-10-25 17:35:07 +0200 |
| commit | e582b629f0b50c10137ba47c4ca7fe30b3357e3d (patch) | |
| tree | 0493ead1dcd8b995d31b488558ded08b22823be5 /target/i386/cpu.c | |
| parent | 45b5933f7afb055080e915c83663f3a4709a02db (diff) | |
| download | focaccia-qemu-e582b629f0b50c10137ba47c4ca7fe30b3357e3d.tar.gz focaccia-qemu-e582b629f0b50c10137ba47c4ca7fe30b3357e3d.zip | |
target/i386: implement SHA instructions
The implementation was validated with OpenSSL and with the test vectors in https://github.com/rust-lang/stdarch/blob/master/crates/core_arch/src/x86/sha.rs. The instructions provide a ~25% improvement on hashing a 64 MiB file: runtime goes down from 1.8 seconds to 1.4 seconds; instruction count on the host goes down from 5.8 billion to 4.8 billion with slightly better IPC too. Good job Intel. ;) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/cpu.c')
| -rw-r--r-- | target/i386/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index bdca901dfa..070c02000f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -714,7 +714,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1, CPUID_7_0_EBX_PCOMMIT | CPUID_7_0_EBX_CLFLUSHOPT | \ CPUID_7_0_EBX_CLWB | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_FSGSBASE | \ CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_RDSEED | \ - CPUID_7_0_EBX_KERNEL_FEATURES) + CPUID_7_0_EBX_SHA_NI | CPUID_7_0_EBX_KERNEL_FEATURES) /* missing: CPUID_7_0_EBX_HLE CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM */ |