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authorEduardo Habkost <ehabkost@redhat.com>2017-03-09 15:12:12 -0300
committerEduardo Habkost <ehabkost@redhat.com>2017-03-10 15:01:09 -0300
commitec56a4a7b07e2943f49da273a31e3195083b1f2e (patch)
treeb5a466451b05e13429e613d9c8e75507e8d318d7 /target/i386/cpu.c
parent40e80ee4113ad957b633cbdddb7423952bb76974 (diff)
downloadfocaccia-qemu-ec56a4a7b07e2943f49da273a31e3195083b1f2e.tar.gz
focaccia-qemu-ec56a4a7b07e2943f49da273a31e3195083b1f2e.zip
i386: Change stepping of Haswell to non-blacklisted value
glibc blacklists TSX on Haswell CPUs with model==60 and
stepping < 4. To make the Haswell CPU model more useful, make
those guests actually use TSX by changing CPU stepping to 4.

References:
* glibc commit 2702856bf45c82cf8e69f2064f5aa15c0ceb6359
  https://sourceware.org/git/?p=glibc.git;a=commit;h=2702856bf45c82cf8e69f2064f5aa15c0ceb6359

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20170309181212.18864-4-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target/i386/cpu.c')
-rw-r--r--target/i386/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 30ba1bd06b..7aa762245a 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1196,7 +1196,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
         .vendor = CPUID_VENDOR_INTEL,
         .family = 6,
         .model = 60,
-        .stepping = 1,
+        .stepping = 4,
         .features[FEAT_1_EDX] =
             CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
             CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |