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| author | Akihiko Odaki <akihiko.odaki@daynix.com> | 2024-02-27 14:43:18 +0000 |
|---|---|---|
| committer | Alex Bennée <alex.bennee@linaro.org> | 2024-02-28 09:09:58 +0000 |
| commit | ecd6f6a8820c8fa91e4d96c1bb640913bd856343 (patch) | |
| tree | 6e19dc3d6d42c39bfd11781ebf69d73225d59702 /target/loongarch/cpu.c | |
| parent | ee59fa1dd57bac8ba8c81e02f2710ba08d1aa49d (diff) | |
| download | focaccia-qemu-ecd6f6a8820c8fa91e4d96c1bb640913bd856343.tar.gz focaccia-qemu-ecd6f6a8820c8fa91e4d96c1bb640913bd856343.zip | |
gdbstub: Infer number of core registers from XML
GDBFeature has the num_regs member so use it where applicable to remove magic numbers. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20231213-gdb-v17-8-777047380591@daynix.com> [AJB: remove core reg check from microblaze read reg] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240227144335.1196131-13-alex.bennee@linaro.org>
Diffstat (limited to 'target/loongarch/cpu.c')
| -rw-r--r-- | target/loongarch/cpu.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 7dc50bf35f..bc2684179f 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -815,7 +815,6 @@ static void loongarch32_cpu_class_init(ObjectClass *c, void *data) { CPUClass *cc = CPU_CLASS(c); - cc->gdb_num_core_regs = 35; cc->gdb_core_xml_file = "loongarch-base32.xml"; cc->gdb_arch_name = loongarch32_gdb_arch_name; } @@ -829,7 +828,6 @@ static void loongarch64_cpu_class_init(ObjectClass *c, void *data) { CPUClass *cc = CPU_CLASS(c); - cc->gdb_num_core_regs = 35; cc->gdb_core_xml_file = "loongarch-base64.xml"; cc->gdb_arch_name = loongarch64_gdb_arch_name; } |