summary refs log tree commit diff stats
path: root/target/m68k/gdbstub.c
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2019-07-01 16:59:29 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-07-01 16:59:29 +0100
commit5e6ebacc3b1e4e8d52a27b9f236fdc01d828641c (patch)
tree08b11c91ac919bf8aa7d6e001dc201c5bbc4b683 /target/m68k/gdbstub.c
parentae9108f8f0746ce64d02afb1a216153a50926132 (diff)
parentc6d0700f57b2c50229a27e31b9f99056a011215f (diff)
downloadfocaccia-qemu-5e6ebacc3b1e4e8d52a27b9f236fdc01d828641c.tar.gz
focaccia-qemu-5e6ebacc3b1e4e8d52a27b9f236fdc01d828641c.zip
Merge remote-tracking branch 'remotes/vivier/tags/m68k-next-pull-request' into staging
remove m68k simulator syscall interface
Fix comments format
Fix gdbstub

# gpg: Signature made Wed 26 Jun 2019 17:20:41 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-next-pull-request:
  linux-user/m68k: remove simulator syscall interface
  m68k comments break patch submission due to being incorrectly formatted
  The m68k gdbstub SR reg request doesnt include Condition-Codes

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/m68k/gdbstub.c')
-rw-r--r--target/m68k/gdbstub.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c
index e6baf0601e..fdc96f57ff 100644
--- a/target/m68k/gdbstub.c
+++ b/target/m68k/gdbstub.c
@@ -35,13 +35,16 @@ int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
     } else {
         switch (n) {
         case 16:
-            return gdb_get_reg32(mem_buf, env->sr);
+            /* SR is made of SR+CCR, CCR is many 1bit flags so uses helper */
+            return gdb_get_reg32(mem_buf, env->sr | cpu_m68k_get_ccr(env));
         case 17:
             return gdb_get_reg32(mem_buf, env->pc);
         }
     }
-    /* FP registers not included here because they vary between
-       ColdFire and m68k.  Use XML bits for these.  */
+    /*
+     * FP registers not included here because they vary between
+     * ColdFire and m68k.  Use XML bits for these.
+     */
     return 0;
 }