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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-02 18:49:00 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-13 20:26:02 +0100 |
| commit | 17c2c320f3c216f80c2fad1f0fa9358c2ffbd0d3 (patch) | |
| tree | cd5bd83fc8738fae872942478003ac6baf5e7f4c /target/mips/cpu.c | |
| parent | 585c80ad7bb1bfd62721d03b62424fb1a786f659 (diff) | |
| download | focaccia-qemu-17c2c320f3c216f80c2fad1f0fa9358c2ffbd0d3.tar.gz focaccia-qemu-17c2c320f3c216f80c2fad1f0fa9358c2ffbd0d3.zip | |
target/mips: Introduce ase_mt_available() helper
Instead of accessing CP0_Config3 directly and checking the 'Multi-Threading Present' bit, introduce an helper to simplify code review. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201204222622.2743175-3-f4bug@amsat.org>
Diffstat (limited to 'target/mips/cpu.c')
| -rw-r--r-- | target/mips/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 687e2680dd..9d7edc1ca2 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -74,7 +74,7 @@ static bool mips_cpu_has_work(CPUState *cs) } /* MIPS-MT has the ability to halt the CPU. */ - if (env->CP0_Config3 & (1 << CP0C3_MT)) { + if (ase_mt_available(env)) { /* * The QEMU model will issue an _WAKE request whenever the CPUs * should be woken up. |