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authorPeter Maydell <peter.maydell@linaro.org>2025-01-24 16:27:40 +0000
committerPeter Maydell <peter.maydell@linaro.org>2025-01-28 18:40:19 +0000
commit7af64d103d2d81e4b1a9a7c92a803abb2bcd6d91 (patch)
tree7709b60ef7459d812d401fadeee7bd075f4eba56 /target/mips/tcg/msa_helper.c
parent584b7aec817ea2c2d24cbc92588363caee8667ab (diff)
downloadfocaccia-qemu-7af64d103d2d81e4b1a9a7c92a803abb2bcd6d91.tar.gz
focaccia-qemu-7af64d103d2d81e4b1a9a7c92a803abb2bcd6d91.zip
fpu: Rename float_flag_output_denormal to float_flag_output_denormal_flushed
Our float_flag_output_denormal exception flag is set when
the fpu code flushes an output denormal to zero. Rename
it to float_flag_output_denormal_flushed:
 * this keeps it parallel with the flag for flushing
   input denormals, which we just renamed
 * it makes it clearer that it doesn't mean "set when
   the output is a denormal"

Commit created with
 for f in `git grep -l float_flag_output_denormal`; do sed -i -e 's/float_flag_output_denormal/float_flag_output_denormal_flushed/' $f; done

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250124162836.2332150-21-peter.maydell@linaro.org
Diffstat (limited to 'target/mips/tcg/msa_helper.c')
-rw-r--r--target/mips/tcg/msa_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c
index aeab6a1d8b..ec38d9fde5 100644
--- a/target/mips/tcg/msa_helper.c
+++ b/target/mips/tcg/msa_helper.c
@@ -6241,7 +6241,7 @@ static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
     }
 
     /* Set Inexact (I) and Underflow (U) when flushing outputs to zero */
-    if ((ieee_exception_flags & float_flag_output_denormal) &&
+    if ((ieee_exception_flags & float_flag_output_denormal_flushed) &&
             (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
         mips_exception_flags |= FP_INEXACT;
         if (action & CLEAR_FS_UNDERFLOW) {