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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-01-29 17:45:00 +0100
committerThomas Huth <thuth@redhat.com>2024-03-12 12:04:24 +0100
commit4c44a9805127d8f6f065d40fd9f9c65fcf75bcc2 (patch)
tree2248f4de779c6e3bc2186cf6f4021191eb7d69a1 /target/mips/tcg/sysemu/tlb_helper.c
parentda9536433fe9d35363fea26cee7f2de93c007ec2 (diff)
downloadfocaccia-qemu-4c44a9805127d8f6f065d40fd9f9c65fcf75bcc2.tar.gz
focaccia-qemu-4c44a9805127d8f6f065d40fd9f9c65fcf75bcc2.zip
target/mips: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240129164514.73104-19-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'target/mips/tcg/sysemu/tlb_helper.c')
-rw-r--r--target/mips/tcg/sysemu/tlb_helper.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c
index cdae42ffdd..119eae771e 100644
--- a/target/mips/tcg/sysemu/tlb_helper.c
+++ b/target/mips/tcg/sysemu/tlb_helper.c
@@ -906,8 +906,7 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                        MMUAccessType access_type, int mmu_idx,
                        bool probe, uintptr_t retaddr)
 {
-    MIPSCPU *cpu = MIPS_CPU(cs);
-    CPUMIPSState *env = &cpu->env;
+    CPUMIPSState *env = cpu_env(cs);
     hwaddr physical;
     int prot;
     int ret = TLBRET_BADADDR;
@@ -1340,8 +1339,7 @@ void mips_cpu_do_interrupt(CPUState *cs)
 bool mips_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
 {
     if (interrupt_request & CPU_INTERRUPT_HARD) {
-        MIPSCPU *cpu = MIPS_CPU(cs);
-        CPUMIPSState *env = &cpu->env;
+        CPUMIPSState *env = cpu_env(cs);
 
         if (cpu_mips_hw_interrupts_enabled(env) &&
             cpu_mips_hw_interrupts_pending(env)) {